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Combinational Logic Circuits Chapter 2 Mano and Kime.

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Presentation on theme: "Combinational Logic Circuits Chapter 2 Mano and Kime."— Presentation transcript:

1 Combinational Logic Circuits Chapter 2 Mano and Kime

2 Combinational Logic Circuits Binary Logic and Gates Boolean Algebra Standard Forms Map Simplification Map Manipulation NAND and NOR Gates Exclusive-OR Gates Integrated Circuits

3 Digital Logic Gates *

4 Gates with More than Two Inputs

5 Combinational Logic Circuits Binary Logic and Gates Boolean Algebra Standard Forms Map Simplification Map Manipulation NAND and NOR Gates Exclusive-OR Gates Integrated Circuits

6 Basic Identities of Boolean Algebra

7 Implementation of Boolean Function with Gates

8 Combinational Logic Circuits Binary Logic and Gates Boolean Algebra Standard Forms Map Simplification Map Manipulation NAND and NOR Gates Exclusive-OR Gates Integrated Circuits

9 Minterms for Three Variables

10 Sum of Products Design X Y minterms 0 0 m0 = !X & !Y 0 1 m1 = !X & Y 1 0 m2 = X & !Y 1 1 m3 = X & Y

11 Sum of Products Design X Y Z 0 0 0 0 1 1 1 0 1 1 1 0 Design an XOR gate m1 = !X & Y m2 = X & !Y Z = m1 # m2 = (!X & Y) # (X & !Y)

12 Sum of Products: Exclusive-OR !X & Y X & !Y Z = (!X & Y) # (X & !Y)

13 Maxterms for Three Variables

14 Product of Sums Design Maxterms: A maxterm is NOT a minterm maxterm M0 = NOT minterm m0 M0 = !m0 = !(!X & !Y) = !!(!!X # !!Y) = X # Y

15 Product of Sums Design X Y minterms maxterms 0 0 m0 = !X & !Y M0 = !m0 = X # Y 0 1 m1 = !X & Y M1 = !m1 = X # !Y 1 0 m2 = X & !Y M2 = !m2 = !X # Y 1 1 m3 = X & Y M3 = !m3 = !X # !Y

16 Product of Sums Design X Y Z 0 0 0 0 1 1 1 0 1 1 1 0 Design an XOR gate Z is NOT minterm m0 AND it is NOT minterm m3

17 Product of Sums Design X Y Z 0 0 0 0 1 1 1 0 1 1 1 0 Design an XOR gate M0 = X # Y M3 = !X # !Y Z = M0 & M3 = (X # Y) & (!X # !Y)

18 Product of Sums: Exclusive-OR

19 Three- Level and Two- Level Implementation

20 Combinational Logic Circuits Binary Logic and Gates Boolean Algebra Standard Forms Map Simplification Map Manipulation NAND and NOR Gates Exclusive-OR Gates Integrated Circuits

21 Two-Variable Map

22 Three-Variable Map

23 Three- Variable Map: Flat and on a Cylinder to Show Adjacent Squares

24 Three-variable K-Maps X YZ 00011110 0 1 11 11 F = !X & !Y # X & Z

25 Three-variable K-Maps X YZ 00011110 0 1 11 11 F = !X & !Y & !Z # !X & !Y & Z # X & !Y & Z # X & Y & Z F = !X & !Y & (!Z # Z) # X & Z & (!Y # Y) = !X & !Y # X & Z

26 Three-variable K-Maps X YZ 00011110 0 1 1 1 11 F = Y & !Z # X 1

27 Three-variable K-Maps X YZ 00011110 0 1 11 111 1 F = !X & !Y # X & y # Z

28 Three-variable K-Maps X YZ 00011110 0 1 11 11 F = X & Z # !X & !Z

29 Three-variable K-Maps X YZ 00011110 0 1 11 11 1 1 F = Y # !Z

30 Three-variable K-Maps X YZ 00011110 0 1 0123 4567 11 11 F = m0 # m2 # m5 # m7 =  (0,2,5,7)

31 Four-Variable Map

32 Four-Variable Map: Flat and on a Torus to Show Adjacencies

33 Four-variable K-Maps WX YZ 00011110 00 01 11 10

34 Four-variable K-Maps WX YZ 00011110 00 01 11 10 0123 4567 89 11 12131415 F(W,X,Y,Z) =  (2,4,5,6,7,9,13,14,15)

35 Four-variable K-Maps 111 1 1 WX YZ 00011110 00 01 11 10 111 1 F = !W & X # X & Y # !W & Y & !Z # W & !Y & Z

36 Combinational Logic Circuits Binary Logic and Gates Boolean Algebra Standard Forms Map Simplification Map Manipulation NAND and NOR Gates Exclusive-OR Gates Integrated Circuits

37 Prime Implicants F = X & !Y & Z # !X & !Z # !X & Y Each product term is an implicant A product term that cannot have any of its variables removed and still imply the logic function is called a prime implicant.

38 Combinational Logic Circuits Binary Logic and Gates Boolean Algebra Standard Forms Map Simplification Map Manipulation NAND and NOR Gates Exclusive-OR Gates Integrated Circuits

39 Digital Logic Gates >

40 >

41 Logical Operations with NAND Gates

42 Alternative Graphics Symbols for NAND and NOT Gates

43 Logical Operations with NOR Gates

44 Two Graphic Symbols for NOR Gate

45 Demonstration of Positive and Negative Logic

46 Generalized De Morgan’s Theorem NOT all variables Change & to # and # to & NOT the result -------------------------------------------- F = X & Y # X & Z # Y & Z F = !((!X # !Y) & (!X # !Z) & (!Y # !Z)) F = !(!(X & Y) & !(X & Z) & !(Y & Z))

47

48 NAND Gate

49 X Y X Z Y Z F F = X & Y # X & Z # Y & Z

50 Combinational Logic Circuits Binary Logic and Gates Boolean Algebra Standard Forms Map Simplification Map Manipulation NAND and NOR Gates Exclusive-OR Gates Integrated Circuits

51 Exclusive-OR Gate XOR X Y Z Z = X $ Y X Y Z 0 0 0 0 1 1 1 0 1 1 1 0 X $ 0 = X X $ 1 = !X X $ X = 0 X $ !X = 1 X $ !Y = !(X $ Y) !X $ Y = !(X $ Y) A $ B = B $ A (A $ B) $ C = A $ (B $ C) = A $ B $ C

52 Exclusive-OR Constructed with NAND gates X & (!X # !Y) # Y & (!X # !Y) = X & !X # X & !Y # Y & !X # Y & !Y = X & !Y # Y & !X = X & !Y # !X & Y = X $ Y

53 Odd Function X $ Y $ Z = (X & !Y # !X & Y) & !Z # (X & Y # !X & !Y) & Z = X & !Y & !Z # !X & Y & !Z # !X & !Y & Z # X & Y & Z

54 Odd Function

55 Parity Generation and Checking

56 Combinational Logic Circuits Binary Logic and Gates Boolean Algebra Standard Forms Map Simplification Map Manipulation NAND and NOR Gates Exclusive-OR Gates Integrated Circuits

57 Fully Complementary CMOS Gate Structure and Examples

58 F = A + B*C

59 Transmission Gate (TG)

60 Selector and Exclusive- OR Constructed with Transmission Gates


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