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Design and Implementation of VLSI Systems (EN1600) lecture05 Sherief Reda Division of Engineering, Brown University Spring 2008 [sources: Weste/Addison Wesley]
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Summary of Terminology body diffusion (n/p) source drain well tap contact metal track via polysilicon gate length/width gate oxide channel All these structures must obey the dimensions and separation rules dictated by the process fabrication facility
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Process design rules Design rules change from fab to fab Fab examples: IBM, Intel, TI, TSMC, UMC, MOSIS Design rules change according to the process technology
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Lambda rules Feature Size: minimum distance between source and drain of transistor Feature size = 2λ (@ 90nm feature size λ=45) According to Moore’s Law, how much does the feature size scale by every ~2 years?
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Design rules and gate layout Lambda rules are conservative
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More design rules
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More and more design rules
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Inverters with taps
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Layout of a 3-input NAND gate
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Stick diagrams No need to be drawn to scale
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Pitch of routing tracks
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Gate area estimation
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