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C HAPTER S IX R EGISTERS AND C OUNTERS 1. A clocked sequential circuit consists of a group of flip-flops and combinational gates connected to form a feedback.

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Presentation on theme: "C HAPTER S IX R EGISTERS AND C OUNTERS 1. A clocked sequential circuit consists of a group of flip-flops and combinational gates connected to form a feedback."— Presentation transcript:

1 C HAPTER S IX R EGISTERS AND C OUNTERS 1

2 A clocked sequential circuit consists of a group of flip-flops and combinational gates connected to form a feedback path. A circuit with flip-flops is considered a sequential circuit even in the absence of combinational gates. Circuits that include flip-flops are classified by the function they perform. Two such circuits are registers and counters. 2

3 A register is a group of flip-flops, each one of which is capable of storing one bit of information. An n-bit register consists of a group of n flip-flops. A register consists of a group of flip-flops together with gates that affect their operation. (they determine how the information is transferred into register). A counter is a special type of register that goes through a predetermined sequence of binary states. 3

4 4 Four-bit register

5 R EGISTER WITH PARALLEL LOAD The transfer of new information into a register is referred to as loading or updating the register. If all the bits of the register are loaded simultaneously with a common clock pulse, we say that the loading is done in parallel. 5 CLEAR or RESET. When CLEAR is 0 the flip flop is resetting independent of clock and D values. It is useful because in digital systems when the power is turned on the state of flip-flops is unknown. Direct input CLEAR can bring all flip-flops to the known starting state prior to the clock operation.

6 6 Four-bit register with parallel load Two channel mux

7 S HIFT R EGISTERS A register capable of shifting the binary information held in each cell to its neighboring cell in a selected direction is called a shift register. It consists of a chain of flip-flops in cascade, with the output of one flip-flop connected to the input of the next flip-flop. All flip-flops receive common clock pulses, which activate the shift of data from one stage to the next. 7

8 8 Four-bit shift register input1011 F.F #1 (0)F.F #2 (0)F.F #3 (0)F.F #4 (0) 1 1 1 0 000 010 011 101

9 S ERIAL T RANSFER A digital system is said to operate in serial mode when information is transferred and manipulated one bit at a time. Information is transferred one bit at a time by shifting the bits out of the source register into the destination register. The serial transfer of information from register A to register B is done with shift registers where the SO of register A is connected to the SI of register B. We can control the shift operation by connecting shift control with the clock through an AND gate 9

10 10 Serial transfer from register A to register B

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12 12 In the parallel mode, information is available from all bits of a register and all bits can be transferred simultaneously during one clock pulse. In the serial mode, the registers have a single serial input and a single serial output. The information is transferred one bit at a time while the registers are shifted in the same direction.

13 U NIVERSAL SHIFT REGISTER A register capable of shifting in one direction only is a unidirectional shift register. A register capable of shifting in both direction is a bidirectional shift register. If the register has both shifts and parallel-load capabilities, it is referred to as a universal shift register. 13

14 The most general shift register has the following capabilities:  A clear control to clear the register to 0.  A clock input to synchronize the operation.  A shift-right control and the serial input & output lines associated with it.  A shift-left control and the serial input & output lines associated with it.  A parallel-load control and the n input lines associated with the parallel transfer.  n parallel output lines.  A control state that leaves the information in the register unchanged in response to the clock. 14

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