1. Unit-1 PREPARED BY: PROF. HARISH I RATHOD COMPUTER ENGINEERING DEPARTMENT GUJARAT POWER ENGINEERING & RESEARCH INSTITUTE Advance Processor

2. Introduction The word microprocessor was introduced by Intel Corporation. It a single chip microcomputer. All the functional component of a computer are inbuilt on a single chip using VLSI technology. Consist of ALU, Register Unit and Control unit. (Single Chip) It is characterized by: speed, word length architecture and instruction set. GPERI – AP- UNIT-12

3. 16-bit microprocessors Intel introduce 16-bit microprocessor 8086 in 1978 and 8088 in 1979. It had 29,000 resisters. 8086 is the next generation microprocessor. The architecture of 8086 also called X86 having five major evolutionary stages. The 8086, 8088, and 80186, 80188 are first generation of 80X86. GPERI – AP- UNIT-13

4. 16-bit microprocessors The next generations are the 80286 followed by 80386 and then 80486. Pentium is the fifth generation microprocessor. 16-bit: Its ALU, internal registers and most of instructions are designed to work with 16-bit binary word. 8086 has 16-bit data bus, so it can read data from or write data to memory and port either 16-bits or 8-bits at a time. GPERI – AP- UNIT-14

5. 16-bit microprocessors 8086 has 20-bit address bus, so it can address any one of 2 20 or 1,048,576 memory location. Memory addresses of 8086 represents a byte wide location. 16-bits words will be stored in two consecutive memory location. If the first byte of a word is at an even address, the 8086 can read the entire word in one operation. ExampleExample Else it can read first byte with one bus operation and second byte with another bus operation. GPERI – AP- UNIT-15

6. 16-bit microprocessors The Intel 8088 has the same ALU, Registers and Instruction set as 8086. The 8088 has also 20-bits address bus, so it can address any one of 1,048,576 bytes in memory. The 8088 has 8-bit data bus, so it can read data from or write data to memory and ports, 8-bits at a time. To read 16-bit word from two successive memory locations, the 8088 will always have to do two read operation. GPERI – AP- UNIT-16

7. Features of 8086 microprocessor It has 16-bit processor. Its ALU, internal registers work with 16- bit binary words. It has 16-bit data bus, so it can read or write data to a memory/port, either 16 bits or 8 bits at a time. It has 20-bit address bus, so it can address up to 2 20 = 1MB memory location. Its Frequency range is 6-10 MHz. Like 8085, it can do only fix point arithmetic. GPERI – AP- UNIT-17

8. Features of 8086 microprocessor The 8086 can work in conjunction with 8087 to do both fixed point, floating point and another complex mathematical functions. It is designed to operate in two modes: minimum mode and maximum mode. Minimum mode: works in a single processor environment and generate control signals. (pin 24 through 31) Maximum mode: works with the coprocessor 8087 and generate signals (pin 24 through 31) GPERI – AP- UNIT-18

9. Features of 8086 microprocessor The 8086 works in a multiprocessor environment. Control signals for memory and I/O are generated by an external BUS controller. It can fetch up to six instruction bytes from memory and queues them to speed up instruction execution. It require +5 V power supply. It uses a 40-pin dual line package. It has two blocks : BIU(Bus Interface Unit) and EU(Execution Unit) GPERI – AP- UNIT-19

10. 8086 Architecture The 8086 CPU is divided into two independent functional parts. BIU (Bus Interface Unit) EU (Execution Unit) BIU (Bus Interface Unit) It perform all the bus operation such as instruction fetching, reading and writing operands for memory. Calculating address of the memory operand. It prefetch of up to six bytes of instruction code. (Transferred to instruction queue). GPERI – AP- UNIT-110

11. 8086 Architecture EU (Execution Unit) It tells the BIU where to fetch instructions or data from. Decodes instruction, and execute instructions. GPERI – AP- UNIT-111

12. 8086 Architecture Block Diagram of 8086. GPERI – AP- UNIT-112

13. 8086 Architecture (Execution Unit) EU contain: Control Circuitry: directs internal operation Decoder: translates instruction fetched from memory into a series of actions. ALU (16-bit): can add, subtract, AND, OR, XOR, increment, decrement, complement, or shift binary numbers. GPERI – AP- UNIT-113

14. 8086 Architecture (Execution Unit) Flag Register (16-bit) Flag is flip-flop that indicate some condition produced by the execution of an instruction. It has nine active flag. Six flag are used to indicate some condition produce by instruction. (CF, PF, AF, ZF, SF and OF) (Status Flag) Three flags are used to control certain operation of the processor. (TF, IF and DF). (Control Flag) GPERI – AP- UNIT-114

15. 8086 Architecture (Execution Unit) Flag Register (16-bit) GPERI – AP- UNIT-115

16. 8086 Architecture (Execution Unit) Flag Register (16-bit) – Status Flags Carry Flag (CF): Is set when an arithmetic carry or borrow has been generated out of the MSB during an addition or subtraction operation. Parity Flag (SF): Indicates whether the of set bit is odd or even in the binary representation. If the bit is set to 1, the current result is of even parity, else odd parity. GPERI – AP- UNIT-116

17. 8086 Architecture (Execution Unit) Flag Register (16-bit) – Status Flags Auxiliary Carry Flag (ACF): It shows carry propagation from D 3 to D 4 position. This flag is used to convert binary result to BCD result. Zero Flag (ZF): It Indicates whether the result of a mathematical or logical operation is zero or non-zero. For a zero result this bit is set to 1 else set to 0. GPERI – AP- UNIT-117

18. 8086 Architecture (Execution Unit) Flag Register (16-bit) – Status Flags Sign Flag (SF): This flag Indicates whether the result of a mathematical operation is negative or positive, If the result is positive then this bit is set to 0. (D 7 ). Overflow Flag (OF): This flag is used in signed arithmetic operation. If the signed result is more than the destination operand, then flag will be set to 1 otherwise set to 0. GPERI – AP- UNIT-118

19. 8086 Architecture (Execution Unit) Flag Register (16-bit) – Control Flags Trap Flag (SF): If this flag is set to 1, a single step interrupt occur after the execution of next instruction. This flag is used to single step debugging. Interrupt enable Flag (IF): This flag is used to mask or unmaskable interrupt. When this flag is set to 1 maskable interrupt will cause the microprocessor to transfer its control to an interrupt vector specified location. GPERI – AP- UNIT-119

20. 8086 Architecture (Execution Unit) Flag Register (16-bit) – Control Flags Direction Flag (DF): If this flag is used in string related operations. When it is set to 1, it causes string instruction to auto decrement the appropriate index register (SI or DI) GPERI – AP- UNIT-120

21. 8086 Architecture (Execution Unit) General purpose Register EU has four 16-bit general purpose registers: AX, BX, CX and DX. Each of these register can be divided into two parts: higher and lower To store 8-bit data. GPERI – AP- UNIT-121 AX - the Accumulator BX - the Base Register CX - the Count Register DX - the Data Register

22. 8086 Architecture (Execution Unit) General purpose Register AX Accumulator Register Preferred register to use in arithmetic, logic and data transfer instructions because it generates the shortest Machine Language Code. Must be used in multiplication and division operations Must also be used in I/O operations GPERI – AP- UNIT-122

23. 8086 Architecture (Execution Unit) General purpose Register BX Base Register Also serves as an address register CX Control Register Used as a loop counter Used in shift and rotate operations GPERI – AP- UNIT-123

24. 8086 Architecture (Execution Unit) General purpose Register DX Data register Used in multiplication and division Also used in I/O operations CX Control Register Used as a loop counter Used in shift and rotate operations GPERI – AP- UNIT-124

25. 8086 Architecture (Execution Unit) Pointers and base Register The 8086 has four 16-bit pointers and base register. These are used to hold offset or logical addresses within a segment. IP is not under direct control of the programmer GPERI – AP- UNIT-125

26. 8086 Architecture (Execution Unit) Pointers and base Register Stack Pointer (SP): pointing to program stack. Base Pointer (BP): pointing to data in stack segment. It is usually used for base, based index or register indirect addressing. Source Index (SI): It is used for base, based index or register indirect addressing, as well as source data address in string manipulation operation. GPERI – AP- UNIT-126

27. 8086 Architecture (Execution Unit) Pointers and base Register Destination Index (DI): It is used for base, based index or register indirect addressing, as well as destination data address in string manipulation operation. GPERI – AP- UNIT-127