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CPS3340 - Computer Architecture Assignment 4: Multiplication, Division, Floating Point.

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Presentation on theme: "CPS3340 - Computer Architecture Assignment 4: Multiplication, Division, Floating Point."— Presentation transcript:

1 CPS3340 - Computer Architecture Assignment 4: Multiplication, Division, Floating Point

2 A = 50, B = 11, A*B = IterationStepMultiplier (Mr)Multiplicand (Md)Product (P) 0Initial Values001011000000110010000000000000 1 1  P=P+Md 001011000000110010 Shift Left Md001011000001100100000000110010 Shift Right Mr000101000001100100000000110010 2 1  P=P+ Md 000101000001100100000010010110 Shift Left Md000101000011001000000010010110 Shift Right Mr000010000011001000000010010110 3 0  No Op 000010000011001000000010010110 Shift Left Md000010000110010000000010010110 Shift Right Mr000001000110010000000010010110 4 1  P=P+ Md 000001000110010000001000100110 Shift Left Md000001001100100000001000100110 Shift Right Mr000000001100100000001000100110 5 0  No Op 000000001100100000001000100110 Shift Left Md000000011001000000001000100110 Shift Right Mr000000011001000000001000100110 6 0  No Op 000000011001000000001000100110 Shift Left Md000000110010000000001000100110 Shift Right Mr000000110010000000001000100110

3 A = 50, B = 11, A/B = IterationStepQuotient (Q)Divisor (D)Remainder (R) 0Initial Values000000001011000000000000110010 1R=R-D000000001011000000110101110010 R<0  +D, sll Q, Q 0 =0 000000001011000000000000110010 Shift Right D000000000101100000000000110010 2R=R-D000000000101100000111011010010 R<0  +D, sll Q, Q 0 =0 000000000101100000000000110010 Shift Right D000000000010110000000000110010 3R=R-D000000000010110000111110000010 R<0  +D, sll Q, Q 0 =0 000000000010110000000000110010 Shift Right D000000000001011000000000110010 4R=R-D000000000001011000111111011010 R<0  +D, sll Q, Q 0 =0 000000000001011000000000110010 Shift Right D000000000000101100000000110010 5R=R-D000000000000101100000000000110 R>=0  sll Q, Q 0 =1 000001000000101100000000000110 Shift Right D000001000000010110000000000110 6R=R-D000001000000010110111111110000 R<0  +D, sll Q, Q 0 =0 000010000000010110000000000110 Shift Right D000010000000001011000000000110 7R=R-D000010000000001011111111111011 R<0  +D, sll Q, Q 0 =0 000100000000001011000000000110 Shift Right D000100000000000101000000000110

4 IEEE 754 single precision format 63.25 x 10^0 = 111111.01 x 2^0 Normalization : move binary point 5 to the left 1.1111101 x 2^5 S = 0 (positive) Fraction = 1111101 Exponent = 127 + 5 = 132 = 10000100 Final bit pattern: 0 1000 0100 1111 1010 0000 0000 0000 000 146987.40625 x 10^0 = 100011111000101011.011010 x 2^0 normalize, move binary point 17 to the left 1.00011111000101011011010 x 2^17 sign = positive, S=0 Fraction: 00011111000101011011010 exp = 127 + 17 = 144 Final bit pattern: 0 1001 0000 0001 1111 0001 0101 1011 010

5 IEEE 754 double precision format 63.25 x 10^0 = 111111.01 x 2^0 normalize, move binary point 5 to the left 1.1111101 x 2^5 sign = positive, exp = 1023 + 5 = 1028 Final bit pattern: 0 100 0000 0100 1111 1010 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 146987.40625 x 10^0 = 100011111000101011.011010 x 2^0 normalize, move binary point 17 to the left 1.00011111000101011011010 x 2^17 sign = positive, exp = 1023 + 17 = 1040 Final bit pattern: 0 100 0001 0000 0001 1111 0001 0101 1011 0100 0000 0000 0000 0000 0000 0000 0000

6 Binary to FP 1 01111101 00100000000000000000000 S = 1 Fraction = 001000…00 2 Exponent = 01111101 2 = 125 x = (–1) 1 × (1 + 0.001 2 ) × 2 (125 – 127) = (–1) × 1.125 × 2 -2 = –0.28125

7 FP Multiplication A=0.75, B=-10.125, A*B = 0.11*2 0 X -1010.001*2 0 1.10*2 -1 X -1.010001*2 3 (normalize) 1.Add exponents: -1+3=2 2.Multiply significands 1.100000 2 × 1.010001 2 = 1.1110011 2 3.Normalize result & check for over/underflow 1.1110011 2 × 2 2 (no change) 4.Round and renormalize if necessary 1.1110011 2 × 2 2 (no change) 5.Determine sign: +value × –value  –ve –1.1110011 2 × 2 2 = – 111.10011 x 2 0 = –7.59375 10

8 8D280008 16 1000 1101 0010 1000 0000 0000 0000 1000 1) What decimal number does the bit pattern represent if it is an integer? 10001101001010000000000000001000 01110010110101111111111111110111 1 + 01110010110101111111111111111000 = -1926758392 2) What decimal number does the bit pattern represent if it is an unsigned integer? 2368208904 3) If the bit pattern is in an instruction register, what MIPS instruction will be executed? lw $t0, 8($t1)

9 4) What decimal number does the bit pattern represent if it is a floating point number? Use the IEEE 754 standard. 1 00011010 01010000000000000001000 S = 1 Fraction = 01010…01000 2 Exponent = 00011010 2 = 26 x = (–1) 1 × (1 + 0.01010…01000 2 ) × 2 (26 – 127) = –1 × (1+0.25+0.0625+0.00000095367431640625) × 2 -101 = –1.31250095367431640625 / 2 101 1/2 2 1/2 4 1/2 20


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