1. CERN TE-MPE Jonathan Búrdalo Gil MARCH 2013 OVERVIEW OF ITER USER INTERFACE BOX EDMS 1283934

2. CERN TE-MPE-TM 28 th March 2013 Outline 2 Motivation and overview Discharge Loop Interface Box in detail First prototype Second prototype Profinet [11]

3. CERN TE-MPE-TM 28 th March 2013 Outline 3 [11] Motivation and overview Discharge Loop Interface Box in detail First prototype Second prototype Profinet

4. CERN TE-MPE-TM 28 th March 2013 Motivation 4 [11] Protection system: Monitoring + Actuators If Monitoring detects a fault: Actuators switch off system 1 single link is not reliable enough. 2 redundant links provide required safety ITER Magnets offer a different challenge: Maximize availability Minimize fast discharges Therefore, study of other architectures (2oo2,1oo3, 2oo3, etc). M M M AAA

5. CERN TE-MPE-EP Jonathan Búrdalo jburdalo@cern.ch 5 PROFIBUS DP / PROFISAFE IM 153-2H SYNCHRO. LINK SM 326F 10FDO 2xPS per CPU 2x PS Periphery (SITOP) 2x CPU 414HF 2x Comm. Proc. 2x Profibus networks Step7 + AWL + CFC +S7 F SW ET200M SM 326F 24DISM 336FAI 6FAI SM 322 DO 8RO IM 153-2H SM 326F 10FDO ET200M SM 326F 24DISM 336FAI 6FAI SM 322 DO 8RO SM 323 8 DIDO IM 153-2H SM 326F 10FDO SM 326F 24DISM 336FAI 6FAI SM 322 DO 8RO SM 331 8 AI QDFDU 1..9PC QDFDU 1..9PC QDFDU 1..9PC SAME 11 INTERFACES FOR DIFFERENT USERS

6. CERN TE-MPE-TM 28 th March 2013 Outline 6 Motivation and overview Discharge Loop Interface Box in detail First prototype Second prototype Profinet [11]

7. CERN TE-MPE-TM 28 th March 2013 DLIB: Purpose 7 [11] Roles: Simple interface for user signals with the 2oo3 discharge loops. Transmit fast discharge requests to different users. Galvanic Isolation between Users and PLC. Unique way of dealing with client diversity (ie. different interlocks systems, electronics, voltages…). Independent of upgrades at the user side. Responds to required dependability and provides safe and reliable interlocking in both directions. Simplified test and commissioning (common diagnostics and monitoring). Remote test facility as from the level of the client connection.

8. CERN TE-MPE-TM 28 th March 2013 DLIB: General Diagram 8 [11] DL+ IN DL+ OUT DL- IN DL- OUT FROM_USER +/- TO_USER +/- OPTOCOUPLER TRIGGER SCHMIDT OPTOCOUPLER 2oo3 LOGIC LOOP BREAKER (Optocoupler) TRIGGER SCHMIDT FPGA (Test & Monitoring) PROFINET TestControl TestPattern RELAY

9. CERN TE-MPE-TM 28 th March 2013 DLIB: How does it work? 9 [11] DL+ IN DL+ OUT DL- IN DL- OUT FROM_USER +/- TO_USER +/- OPTOCOUPLER TRIGGER SCHMIDT OPTOCOUPLER 2oo3 LOGIC LOOP BREAKER (Optocoupler) TRIGGER SCHMIDT FPGA (Test & Monitoring) PROFINET TestControl TestPattern RELAY

10. CERN TE-MPE-TM 28 th March 2013 DLIB: from USERS to Interface 10 Users send status through 3 independent Current Loops. Current limited by the interface box (fixed current source). Design used at CERN with success (more than 220 similar interface boxes in use). 2oo3 Logic opens discharge loop.

11. CERN TE-MPE-TM 28 th March 2013 DLIB: General Diagram 11 DL+ IN DL+ OUT DL- IN DL- OUT FROM_USER +/- TO_USER +/- OPTOCOUPLER TRIGGER SCHMIDT OPTOCOUPLER 2oo3 LOGIC LOOP BREAKER (Optocoupler) TRIGGER SCHMIDT FPGA (Test & Monitoring) PROFINET TestControl TestPattern RELAYTVS

12. CERN TE-MPE-TM 28 th March 2013 DLIB: from Interface to USERS 12 Transmit to user the status of the discharge loop links. 1 to 1 because of dependability requirements. Users MUST make the 2oo3 evaluation of the signals. Optocoupler acting as dry contact and galvanic isolation with the User

13. CERN TE-MPE-TM 28 th March 2013 DLIB: General Diagram 13 [11] DL+ IN DL+ OUT DL- IN DL- OUT FROM_USER +/- TO_USER +/- OPTOCOUPLER TRIGGER SCHMIDT OPTOCOUPLER 2oo3 LOGIC LOOP BREAKER (Optocoupler) TRIGGER SCHMIDT FPGA (Test & Monitoring) PROFINET TestControl TestPattern RELAYTVS

14. CERN TE-MPE-TM 28 th March 2013 DLIB: Test and Monitoring 14 [11] The Prototype V1 Interfaces had a Profibus slave. V2 uses PROFINET with a new ASIC called TPS-1. 16 bits of data in each direction. Status of discharge loop, clients and extra info (temp, use of 2oo3 logic, configuration…). Managed by FPGA, Actel ProASIC3. Due to time stamping limitations of this solution, and the availability of a new chip, Prototype V2 uses a ITER compliant solution based on Profinet (Industrial Ethernet based Fieldbus).

15. CERN TE-MPE-TM 28 th March 2013 DLIB: General Diagram 15 [11] DL+ IN DL+ OUT DL- IN DL- OUT FROM_USER +/- TO_USER +/- OPTOCOUPLER TRIGGER SCHMIDT OPTOCOUPLER 2oo3 LOGIC LOOP BREAKER (Optocoupler) TRIGGER SCHMIDT FPGA (Test & Monitoring) PROFINET TestControl TestPattern RELAYTVS

16. CERN TE-MPE-TM 28 th March 2013 DLIB: Connectors 16 [11] Use compact and fully enclosed mechanics. BURNDY connectors offer good EMC and dependability. 8 and 12 pins, male and female, to avoid misconnections. Diagnostics port in front panel for monitoring with Profinet.

17. CERN TE-MPE-TM 28 th March 2013 Outline 17 Motivation and overview Discharge Loop Interface Box in detail First prototype Second prototype Profinet [11]

18. CERN TE-MPE-TM 28 th March 2013 Experience from first Prototype 18 [11] The first prototype was assembled and tested thoroughly. Small test board with switches and LEDs to simulate the discharge loop and the users (at 24 V and 5 V). Everything “analogue” works according to specifications. Profibus link has been tested successfully as well. Integration and tests with PLC were done by M. Zaera in Valencia. A first version is installed at ITER since October for the HTS current leads tests. This will serve as a real test of the devices and architecture. PLC + 2 DL Interface Boxes configured with 1oo2 Logic. It “survived” a Preliminary Design Review at ITER.

19. CERN TE-MPE-TM 28 th March 2013 Outline 19 Motivation and overview Discharge Loop Interface Box in detail First prototype Second prototype Profinet [11]

20. CERN TE-MPE-TM 28 th March 2013 Second Prototype 20 Design is finished and we manufactured 5 units that are working and ready for use. The analogue part and interfaces with discharge loop and clients remain mainly unchanged except for small tweaks. The functionality it’s the same. It can work together with a first prototype. Main difference is the use of Profinet instead of Profibus for monitoring. A brand new chip, TPS-1 from Renesas is used to manage the Profinet stack. As it’s Ethernet based: substitution of the frontal DB-9 connector for 2 RJ-45 ports. Allows precise time stamping of 1ms or less. (to be tested yet) Much easier and faster to implement from the PLC point of view. 4 devices will be taken to ITER next week and sent to the different clients for early testing of the interface.

21. CERN TE-MPE-TM 28 th March 2013 Outline 21 Motivation and overview Discharge Loop Interface Box in detail First prototype Second prototype Profinet [11]

22. CERN TE-MPE-TM 28 th March 2013 Profinet 22 Profinet offers several advantages over Profibus: Profibus DPProfinet IO Transmission Tech.RS485-likeInd. Ethernet Data ExchangeOnly by requestCyclical or request Transfer RateMax. 12 Mbit/s100 Mbit/s full duplex # of devices126 (and complicated)Arbitrary Other data (IT services)NoYes Device description (gsd)Keyword basedXML based Data prioritySame for every slaveConfigurable TopologyStar and treeLine, tree, ring

23. CERN TE-MPE-TM 28 th March 2013 TPS-1 23 This brand new chip is in charge of the Profinet stack. 196 pins 1mm pitch BGA package + 2 Fast Ethernet ports. Documentation has been quite a challenge (missing information). A lot of emails exchanged with support and several surprises. Frist time programming of the chip is tedious. But then it works incredibly well. Next Steps: Try the Isochronous Real Time mode (to achieve 1 ms sync) Test with a Siemens PLC and play around with this synchronization options.

24. CERN TE-MPE-TM 28 th March 2013 End 24 [11] THANKS FOR YOUR ATTENTION!

25. CERN TE-MPE-TM 28 th March 2013 DLIB: Integration in D. Loop 25 The Interface is able to read the status of the Discharge loop but also to OPEN it. PLC generates current of 10mA and 24V. Worst case: 2 V drop per Interface Box: – Maximum of 12 Interface Boxes per Loop with a 24 V PLC supply.

26. CERN TE-MPE-TM 28 th March 2013 DLIB: General Diagram 26 DL+ IN DL+ OUT DL- IN DL- OUT FROM_USER +/- TO_USER +/- OPTOCOUPLER TRIGGER SCHMIDT OPTOCOUPLER 2oo3 LOGIC LOOP BREAKER (Optocoupler) TRIGGER SCHMIDT FPGA (Test & Monitoring) PROFINET TestControl TestPattern RELAYTVS

27. CERN TE-MPE-TM 28 th March 2013 DLIB: General Diagram 27 DL+ IN DL+ OUT DL- IN DL- OUT FROM_USER +/- TO_USER +/- OPTOCOUPLER TRIGGER SCHMIDT OPTOCOUPLER 2oo3 LOGIC LOOP BREAKER (Optocoupler) TRIGGER SCHMIDT FPGA (Test & Monitoring) PROFINET TestControl TestPattern RELAYTVS

28. CERN TE-MPE-TM 28 th March 2013 DLIB: 2oo3 Logic 28 The 3 inputs from USERS are evaluated with 2oo3 logic, keeping the loop closed, or open. Inputs and outputs are monitored. 2oo3 should be the default configuration, although exceptionally and justified, some clients can use 1oo2 logic (HW selector on board). Logic Diagram: