1. EE 319K Introduction to Embedded Systems
Lecture 8: Periodic Timer Interrupts, Digital-to-Analog Conversion, Sound, Lab 6
Bard, Gerstlauer, Valvano, Yerraballi

2. Agenda Recap Agenda PLL Data structures FSMs, linked structure
Interrupts
Agenda
Periodic Interrupts
Digital to Analog Conversion
Nyquist Theorem
Sound generation
SysTick ISR
Output one value to DAC
Bard, Gerstlauer, Valvano, Yerraballi

3. 77 total INTERRUPT VECTORS Bard, Gerstlauer, Valvano, Yerraballi Lab 6
Vector address
Number
IRQ
ISR name in Startup.s
NVIC
Priority bits 0x 14 -2
PendSV_Handler
NVIC_SYS_PRI3_R
23 – 21
0x C 15 -1
SysTick_Handler
31 – 29 0x 16
GPIOPortA_Handler
NVIC_PRI0_R
7 – 5 0x 17 1
GPIOPortB_Handler
15 – 13 0x 18 2
GPIOPortC_Handler
0x C 19 3
GPIOPortD_Handler 0x 20 4
GPIOPortE_Handler
NVIC_PRI1_R 0x 21 5
UART0_Handler 0x 22 6
UART1_Handler
0x C 23 7
SSI0_Handler 0x 24 8
I2C0_Handler
NVIC_PRI2_R 0x 25 9
PWMFault_Handler 0x 26 10
PWM0_Handler
0x C 27 11
PWM1_Handler 0x 28 12
PWM2_Handler
NVIC_PRI3_R 0x 29 13
Quadrature0_Handler 0x 30
ADC0_Handler
0x C 31
ADC1_Handler 0x 32
ADC2_Handler
NVIC_PRI4_R 0x 33
ADC3_Handler 0x 34
WDT_Handler
0x C 35
Timer0A_Handler 0x 36
Timer0B_Handler
NVIC_PRI5_R 0x 37
Timer1A_Handler 0x 38
Timer1B_Handler
0x C 39
Timer2A_Handler
0x000000A0 40
Timer2B_Handler
NVIC_PRI6_R
0x000000A4 41
Comp0_Handler
0x000000A8 42
Comp1_Handler
0x000000AC 43
Comp2_Handler
0x000000B0 44
SysCtl_Handler
NVIC_PRI7_R
0x000000B4 45
FlashCtl_Handler
0x000000B8 46
GPIOPortF_Handler
0x000000BC 47
GPIOPortG_Handler
0x000000C0 48
GPIOPortH_Handler
NVIC_PRI8_R
0x000000C4 49
UART2_Handler
0x000000C8 50
SSI1_Handler
0x000000CC 51
Timer3A_Handler
0x000000D0 52
Timer3B_Handler
NVIC_PRI9_R
0x000000D4 53
I2C1_Handler
0x000000D8 54
Quadrature1_Handler
0x000000DC 55
CAN0_Handler
0x000000E0 56
CAN1_Handler
NVIC_PRI10_R
0x000000E4 57
CAN2_Handler
0x000000E8 58
Ethernet_Handler
0x000000EC 59
Hibernate_Handler
0x000000F0 60
USB0_Handler
NVIC_PRI11_R
0x000000F4 61
PWM3_Handler
0x000000F8 62
uDMA_Handler
0x000000FC 63
uDMA_Error
Lab 6
Lab 8
Lab 9
77 total
Lab 10
INTERRUPT VECTORS
Bard, Gerstlauer, Valvano, Yerraballi

4. Nested Vectored Interrupt Controller (NVIC)
Hardware unit that coordinates among interrupts from multiple sources
Define priority level of each interrupt source (NVIC_PRIx_R registers)
Separate enable flag for each interrupt source (NVIC_EN0_R and NVIC_EN1_R)
Interrupt does not set I bit
Higher priority interrupts can interrupt lower priority ones
Bard, Gerstlauer, Valvano, Yerraballi

5. NVIC Registers High order three bits of each byte define priority
Address
31 – 29
23 – 21
15 – 13
7 – 5
Name
0xE000E400
GPIO Port D
GPIO Port C
GPIO Port B
GPIO Port A
NVIC_PRI0_R
0xE000E404
SSI0, Rx Tx
UART1, Rx Tx
UART0, Rx Tx
GPIO Port E
NVIC_PRI1_R
0xE000E408
PWM Gen 1
PWM Gen 0
PWM Fault
I2C0
NVIC_PRI2_R
0xE000E40C
ADC Seq 1
ADC Seq 0
Quad Encoder
PWM Gen 2
NVIC_PRI3_R
0xE000E410
Timer 0A
Watchdog
ADC Seq 3
ADC Seq 2
NVIC_PRI4_R
0xE000E414
Timer 2A
Timer 1B
Timer 1A
Timer 0B
NVIC_PRI5_R
0xE000E418
Comp 2
Comp 1
Comp 0
Timer 2B
NVIC_PRI6_R
0xE000E41C
GPIO Port G
GPIO Port F
Flash Control
System Control
NVIC_PRI7_R
0xE000E420
Timer 3A
SSI1, Rx Tx
UART2, Rx Tx
GPIO Port H
NVIC_PRI8_R
0xE000E424
CAN0
Quad Encoder 1
I2C1
Timer 3B
NVIC_PRI9_R
0xE000E428
Hibernate
Ethernet
CAN2
CAN1
NVIC_PRI10_R
0xE000E42C
uDMA Error
uDMA Soft Tfr
PWM Gen 3
USB0
NVIC_PRI11_R
0xE000ED20
SysTick
PendSV --
Debug
NVIC_SYS_PRI3_R
Bard, Gerstlauer, Valvano, Yerraballi

6. NVIC Interrupt Enable Registers
Two enable registers – NVIC_EN0_R and NVIC_EN1_R
Each 32-bit register has a single enable bit for a particular device
NVIC_EN0_R control the IRQ numbers 0 to 31 (interrupt numbers 16 – 47)
NVIC_EN1_R control the IRQ numbers 32 to 47 (interrupt numbers 48 – 63)
Bard, Gerstlauer, Valvano, Yerraballi

7. Interrupt Rituals Things you must do in every ritual
Initialize data structures (counters, pointers)
Arm (specify a flag may interrupt)
Configure NVIC
Enable interrupt (NVIC_EN0_R)
Set priority (e.g., NVIC_PRI1_R)
Enable Interrupts
Assembly code CPSIE I
C code EnableInterrupts();
Bard, Gerstlauer, Valvano, Yerraballi

8. Interrupt Service Routine (ISR)
Things you must do in every interrupt service routine
Acknowledge
clear flag that requested the interrupt
SysTick is exception; automatic acknowledge
Maintain contents of R4-R11 (AAPCS)
Communicate via shared global variables
Bard, Gerstlauer, Valvano, Yerraballi

9. Interrupt Events Respond to infrequent but important events
Alarm conditions like low battery power
Error conditions
I/O synchronization
Trigger interrupt when signal on a port changes
Periodic interrupts
Generated by the timer at a regular rate
Systick timer can generate interrupt when it hits zero
Reload value + frequency determine interrupt rate
Bard, Gerstlauer, Valvano, Yerraballi

10. Synchronization Semaphore Mailbox – to be presented for Lab 8
Use global variable to communicate
Semaphore
One thread sets the flag
The other thread waits for, and clears
Mailbox – to be presented for Lab 8
FIFO queue – to be presented for Lab 9
Bard, Gerstlauer, Valvano, Yerraballi

11. Periodic Interrupts Data acquisition samples ADC
Lab 8 will sample at a fixed rate
Signal generation output to DAC
Audio player (we use the Systick interrupt to write samples out periodically in Lab 6)
Communications
Digital controller
FSM
Linear control system (EE362K)
Demo PeriodicSystickInts starter C code
Bard, Gerstlauer, Valvano, Yerraballi

12. Digital Representation of Analog Signals
Digitization: Amplitude and time quantization
Bard, Gerstlauer, Valvano, Yerraballi

13. Conversion from Digital to Analog
Range
0 to 3.3V
Resolution
3.3V/15 = 0.22V
Precision
4 bits
16 alternative
Speed
Monotonic
Bard, Gerstlauer, Valvano, Yerraballi

14. Digital ↔ Analog Conversion
Sampled at a fixed time, Dt
Bard, Gerstlauer, Valvano, Yerraballi

15. Digital ↔ Analog Conversion
Digital in voltage and in time
fs = 1/Dt
Signal has frequencies 0 to ½ fs
Bard, Gerstlauer, Valvano, Yerraballi

16. Digital-to-Analog Converter (DAC)
Binary Weighted DAC
One resistor for each bit of output
Resistor values in powers of 2
Resistance: R = V/I
Two resistors R1 and R2 in series.
Kirchhoff laws: V = V1 + V2, I = I1 = I2
Applied: V2 = R2 * I2 = R2 * I
V = R1*I1 + R2*I2 = I*(R1+R2)
Equivalent resistance: R = V / I = R1 + R2
Voltage divider: What is the voltage V2 at intermediate node?
V2 = R2 * I = R2 / (R1+R2) * V
Two resistors R1 and R2 in parallel:
Kirchhoff laws: V = V1 = V2, I = I1 + I2
Applied: I = V1/R1 + V2/R2 = V * (1/R1 + 1/R2)
Equivalent resistance: R = V / I = 1 / (1/R1 + 1/R2)
2-bit DAC on the right:
A cascade of resistors R, 2R that can be switched to Vdd or ground.
All resistors that are switched to Vdd (output bit Qx = 1) operate in parallel:
Rdd = 1 / (Q1/R + Q0/2R) = 2R / (2Q1 + Q0)
All resistors that are switched to ground operate in parallel:
R’ = 1 / (Q’1/R + Q’0/ 2R) = 2R / (2Q’1 + Q’0)
Total resistance of Vdd and ground resistor networks in series:
2R * ((2Q’1 + Q’0) + (2Q1 + Q0)) R * (2 + 1)
R = Rdd + R’ = =
(2Q1 + Q0) * (2Q’1 + Q’0) (2Q1 + Q0) * (2Q’1 + Q’0)
Voltage divider:
Vout = Vdd * R’ / R = Vdd * (2Q1 + Q0) / 3
Bard, Gerstlauer, Valvano, Yerraballi

17. 3 bit DAC Bard, Gerstlauer, Valvano, Yerraballi R2 10 kΩ R1 20 R0 40 n
PB2
PB1
PB0
kohm
equation
Vout (V)
0.000 1
3.3
R2||R1
6.67
3.3*(R1||R2)/(R0+R1||R2)
0.471 2
R2||R0
8.00
3.3*(R2||R0)/(R1+R2||R0)
0.943 3
R1||R0
13.33
3.3*R2/(R2+R1||R0)
1.414 4
3.3*(R1||R0)/(R2+R1||R0)
1.886 5
3.3*R1/(R1+R2||R0)
2.357 6
3.3*R0/(R0+R2||R1)
2.829 7
3.300
Bard, Gerstlauer, Valvano, Yerraballi

18. Other Types of DACs R-2R Ladder DAC Binary weighted cascading ladder
Improved precision owing to ability to select resistors of equal value
Bard, Gerstlauer, Valvano, Yerraballi

19. DAC Performance Resolution, range, precision
Maximum sampling frequency
Monotonicity
Input increase causes output increase (always)
Bard, Gerstlauer, Valvano, Yerraballi

20. Resistor Network for 4-bit DAC
Vout = Vdd * (8*Q3 + 4*Q2 + 2*Q1 + Q0)/15
Bard, Gerstlauer, Valvano, Yerraballi

21. Dynamic testing
Bard, Gerstlauer, Valvano, Yerraballi

22. Sound Loudness and pitch Controlled by amplitude and frequency
Humans can hear from about 25 to 20,000 Hz.
Middle A is 440 Hz
Other notes on a keyboard are determined
440 * 2N/12, where N is no. of notes from middle A.
Middle C is Hz.
Music contains multiple harmonics
Bard, Gerstlauer, Valvano, Yerraballi

23. Tempo Tempo defines note duration Quarter note = 1 beat
120 beats/min => ½ s duration
Bard, Gerstlauer, Valvano, Yerraballi

24. Chord Two notes at the same time Superimposed waveforms
262 Hz (low C) and a 392 Hz (G)
Bard, Gerstlauer, Valvano, Yerraballi

25. Instrument Characteristics
Waveform shape of a trumpet sound
Plucked string signal with envelope
Bard, Gerstlauer, Valvano, Yerraballi

26. Synthesizing Digital Music
Nyquist’s Sampling Theorem
We can reproduce any bandlimited signal from its samples if we sample correctly and at a frequency, fs, that is at least twice the highest frequency component of the signal, fmax.
Where do we get the samples?
We could sample a series of musical tones
We can compute the samples
Bard, Gerstlauer, Valvano, Yerraballi

27. Synthesizing Digital Music (cont.)
What is a musical tone?
A sinusoid of a particular frequency
Notes vary by twelfth root of 2 ~ 1.059
What would the samples be?
Fixed point numbers
How do we generate a sinusoid?
Output appropriate digital values via a resistor network that effectively produces an pseudo-analog signal
What about frequency?
Employ a programmable timer to tell us when to output the next value
Bard, Gerstlauer, Valvano, Yerraballi

28. Synthesizing Digital Music (cont.)
440 Hz sine wave generated by 6-bit DAC
Frequency
spectrum
Bard, Gerstlauer, Valvano, Yerraballi

29. Music Generation – Lab 6 Objectives
Employ LM4F/TM4C to generate appropriately scaled digital outputs at a specified frequency
Three frequencies are required
Frequencies are to be determined by switch settings
Four digital outputs are inputs to a resistor network that serves as a digital-to-analog converter (DAC)
Four output bits => 16 levels
Bard, Gerstlauer, Valvano, Yerraballi

30. Music Generation (cont.)
DAC hardware
Employ least significant four bits of a GPIO port
Arrange resistor network in 1, 2, 4, 8 sequence
Each port bit can assume digital levels of 0 and 3.3 V
Ports are current limited – max 8 mA R3 R2 R1 R0
Bard, Gerstlauer, Valvano, Yerraballi

31. Music Generation (cont.)
DAC software
Interactions via device drivers
Two device driver functions required
void DAC_Init(void); // initializes the device
void DAC_Out(unsigned char data); // transfers data to device
(Device driver provides the functions associated with the device but hides the detailed actions necessary to implement the functions.)
Bard, Gerstlauer, Valvano, Yerraballi

32. Music Generation (cont.)
Interpretation of data
Note has three parameters
Amplitude (loudness)
Frequency (pitch)
Duration
Amplitude is a digitally approximated sinusoid
Sinusoid varies between 0 and 3.3 volts
Frequency is selected by switches
Four states – stop, note_1, note_2, and note_3
Duration is period switch(es) activated
Bard, Gerstlauer, Valvano, Yerraballi

33. 4-bit Sinusoid Table 32 value sinusoid
SinTab 8,9,11,12,13,14,14,15,15,15,14
14,13,12,11,9,8,7,5,4,3,2
2,1,1,1,2,2,3,4,5,7
32 value sinusoid
Bard, Gerstlauer, Valvano, Yerraballi

34. Musical Notes
Bard, Gerstlauer, Valvano, Yerraballi

35. Tone Generation For a 440Hz tone unsigned long I;
// 4-bit 32-element sine wave
const uint8_t wave[32]= {
8,9,11,12,13,14,14,15,15,15,14
14,13,12,11,9,8,7,5,4,3,2
2,1,1,1,2,2,3,4,5,7};
For a 440Hz tone
Assume a bus clock frequency of 50 MHz
SysTick count every 20ns
Each cycle of the 440 Hz sinusoid requires:
(50*106 counts/s)/440 Hz = SysTick counts
Each cycle consists of 32 values each of duration:
interrupt counts/32 values = SysTick counts/value
DAC values change every us
SysTick ISR
Output one value to DAC
Bard, Gerstlauer, Valvano, Yerraballi

36. Lab 6 ISR Each Systick interrupt In main program
Output one value from the array to DAC
Increment index to array (wrap back to zero)
In main program
If a switch is pressed set SysTick period (arm)
If no switches are pressed then disarm
SysTick ISR
Output one value to DAC
Bard, Gerstlauer, Valvano, Yerraballi

37. Other Instruments // 6-bit 64-element bassoon wave
const uint8_t Bassoon[64] = {
33,37,37,36,35,34,34,33,31,30,29,
30,33,43,58,63,52,31,13,4,5,10,16,
23,32,40,46,48,44,38,30,23,17,12,11,
15,23,32,40,42,39,32,26,23,23,24,25,
25,26,29,30,31,32,34,37,39,37,35,34,
34,34,33,31,30};
// 6-bit 64-element guitar wave
const uint8_t Guitar[64] = {
20,20,20,19,16,12,8,4,3,5,10,17,
26,33,38,41,42,40,36,29,21,13,9,
9,14,23,34,45,52,54,51,45,38,31,
26,23,21,20,20,20,22,25,27,29,
30,29,27,22,18,13,11,10,11,13,13,
13,13,13,14,16,18,20,20,20};
Bard, Gerstlauer, Valvano, Yerraballi