1. Semiconductor Training The Industry Insert Conax Semi Brochure Semiconductor Training The Market Semiconductor Training The Process & Equipment

2. Semiconductor Training The Industry Semi is a Trade Organization that manufacturers of semiconductor manufacturing equipment belong to, companies such as Applied Materials, ASM, AMSL, Veeco (formerly Emcore), Moore Technologies, Novellus, Lam Research, etc. Conax has joined this organization as of February 2004. SIA is a Trade Organization that manufacturers of semiconductors (chips) belong to, companies such as Intel, Texas Instruments, Motorola, AMD, Analog Devices, National Semiconductor, etc.

3. Semiconductor Training The Industry Semiconductor Industry Association (SIA) European Electronic Component Association (EECA) Japan Electronics & Information Technology Industries Association (JEITA) Korean Semiconductor Industry Association (KSIA) Taiwan Semiconductor Industry Association (TSIA) The International Technology Roadmap for Semiconductors (ITRS) is an assessment of the semiconductor technology requirements. The ITRS identifies the technological challenges and needs facing the semiconductor industry over the next 15 years. It is sponsored by:

4. Semiconductor Training The Industry Glossary Fab (Wafer Fabrication Facility…manufacturer may have multiple Fabs at a given location) Susceptor (device that holds a wafer) Photolithography (standard method of transferring a circuit pattern to a wafer) Reticle (the “negative” used to project a circuit pattern over a portion of a wafer) Front End (the making of the silicon portion of a chip, or die) Front End Of Line or FEOL (the building of the device into and on the silicon wafer) Back End Of Line or BEOL (the laying down of the metal interconnects on the wafer) Back End (the packaging of the die into a plastic or ceramic package) Cluster vs. Batch (Processing wafers individually or in groups) HAST (Highly Accelerated Stress Test to check life of an IC and/or test new robustness of designs) LSI (Large Scale Integration, chip with 1,000 – 100,000 components) VLSI (Very Large Scale Integration, chip with 100,000 – 1,000,000 components) ULSI (Ultra Large Scale Integration, chip with over 1,000,000 components) CD (Critical Dimension) CVD (Chemical Vapor Deposition and its many variations)

5. Semiconductor Training The Industry Glossary Units of Measure… 1 millimeter = 1,000 micrometers or 1,000 micron 1 micron = 1,000 nanometers = 10,000 angstrom 1 angstrom = one-billionth of a meter Nanotechnology (the use of geometries smaller than 100 nm) Node (the geometry size being used, typically the half-pitch of DRAM geometries, reached 90 nm in 2004; a node is a 30% reduction in chip geometry, typically happens every 2 – 3 years) MOS ( M etal O xide S emiconductor) pMOS (MOS with positive wells in a negative wafer) nMOS (MOS with negative wells in a positive wafer) CMOS ( C omplementary MOS, combining both pMOS and nMOS) Die or Dice (one integrated circuit cut from a wafer)

6. Semiconductor Training The Industry Moore’s Law: Every 2 years, Chip Memory will quadruple. This general law has been applied to all major chip measures such as component density/shrinkage of geometry, speed, power consumption, etc.

7. Semiconductor Training The Industry Moore’s Law: Every 2 years, Chip Memory will quadruple. This general law has been applied to all major chip measures such as component density/shrinkage of geometry, speed, power consumption, etc.

8. Semiconductor Training The Process & Equipment

10. “Pulling a Crystal” Silicon ingots are grown to the desired diameter. Silicon is naturally neutral (no charge). During manufacture, they are chemically doped as “p-type” (positive) or “n-type” (negative).

11. Semiconductor Training The Process & Equipment Epitaxial Reactors are used to grow additional layers of silicon on the surface of a newly produced wafer. This is done to make a wafer with slight surface defects usable, and to improve diode and transistor performance as geometries decrease. Both of these factors make epi more important as the industry migrates towards larger diameter wafers.

12. Semiconductor Training The Process & Equipment Moore Technologies’ (formerly Applied Materials) Epitaxial Barrel Reactor Original 3-Zone ReactorNew 8-Zone Reactor Susceptor to hold Wafers

13. Semiconductor Training The Process & Equipment Moore Technologies’ (formerly Applied Materials) Epitaxial Barrel Reactor Cut-away view showing perimeter heating lamps (with susceptor removed). Note the center IR temperature sensor with 3 “eyes”. This sensor measures temperature during process runs. During calibration, the Conax Triple- point is inserted into a calibration susceptor to check the IR unit’s readings.

14. Semiconductor Training The Process & Equipment CVD can be used to deposit layers of insulation (dielectric), semiconductor, or conductors. There are many variations of CVD. CVD APCVD RPCVD LPCVD PECVD HDPCVD UHV/CVD MOCVD

15. Semiconductor Training The Process & Equipment Ion Implantation is the process used to create localized areas of relative positive or negative charge. The ions are shielded from the silicon by either an oxide or by a resist mask.

16. Semiconductor Training The Process & Equipment Stripping, or ashing is done to remove the resist following its use. The ions used are reactive only to the resist and nothing to the wafer, oxide or other coatings.

17. Semiconductor Training The Process & Equipment Following ion implantation, the crystal structure of the wafer is damaged. Some sort of heating process is typically done after each implantation to anneal, or reorder the wafer crystal structure. RTP, or Rapid Thermal Processing is the most common method to quickly anneal the wafer without causing other high temperature related damage. RTP: ClusterFurnace: Batch

18. Semiconductor Training The Process & Equipment

19. Metal interconnects on the wafer surface are commonly made of aluminum, which does not deposit well with CVD. PVD is used for coating with aluminum, also called sputtering.

20. CMP (Chemical Mechanical Polishing, or Planarization) uses both chemicals and abrasives to smooth the surface of a wafer are points along its processing. As geometries continue to shrink, clear focus is needed photolithography to attain reliable circuits. CMP also important in Damascene Process. Semiconductor Training The Process & Equipment

21. Semiconductor Training The Market The top OEMs (Original Equipment Manufacturers)

22. Semiconductor Training The Market The top End Users (chip manufacturers)

23. Semiconductor Training The Market

26. Web site: www.conaxbuffalo.com Semi Sub-site

27. Semiconductor Training The Market Temperature Sensors Semi Sub-site Compression Seal Fittings

28. Semiconductor Training The Market Semi Temperature Sensor Sub-site 7 Sample Applications See Individual links for details on each application.

29. Semiconductor Training The Market OEM: Applied Materials/Moore Technologies. Use: Calibrations for IR process control sensors. Price: $3,100 - $6,100 Notes: We custom make variations for customers with unique needs. Currently in talks to make a 7-Point variation for Wacker Siltronic and Sumco.

30. Semiconductor Training The Market OEM: Applied Materials/Moore Technologies. Use: Calibrations for IR process control sensors. Price: $400 Notes: We custom make variations for customers with unique needs. We have made a dual version for Wacker Siltronic.

31. Semiconductor Training The Market OEM: ASM Epsilon Reactor Series. Use: Process control temperature sensors for Epitaxial Wafer Coating. Price: $1,300 per set, per reactor. Notes: Typical life is 1 month for a set of sensors.

32. Semiconductor Training The Market OEM: Veeco (Emcore) TurboDisc. Use: Process control molybdenum sheathed platinum T/C to control MOCVD process. Price: $400 - $600 per sensor. Notes: Price includes junction location x-ray and leak test report.

33. Semiconductor Training The Market OEM: Axcelis Use: Ion implantation process equipment. Price: $240 per sensor. Notes: None

34. Semiconductor Training The Market OEM: APT Use: Process control 2-wire RTD for wafer resist/bake/wash. Price: $25 per sensor x 49 sensors per plate = $1,225. Notes: Typical life is 1 month for a set of sensors.

35. Semiconductor Training The Market Semi Compression Seal Fitting Sub-site 5 Seal Applications See Individual links for details on each application.

36. Semiconductor Training The Market OEM: Espec/Despatch for Intel Use: Signal and T/C feed throughs for HAST (Highly Accelerated Stress Test) Chambers. Price: $2,500 - $5,000 per assembly, $45,000 per chamber. Notes: None

37. Semiconductor Training The Market OEM: Zygo Corporation Use: Fiber Optic Feedthroughs for Laser Interferometry Wafer Stage Movement measurements. Price: $2,500 - $6,000 per assembly, $7,500 to 15,000 per photolithography tool. Notes: Need for this type measurement is increasing due to shrinking chip geometries and new photolithography techniques that require the wafer to be exposed under vacuum.

38. Semiconductor Training The Market OEM Subsystems: In addition to the major tool makers like AMAT (Applied Materials), TEL (Tokyo Electron), etc., there are a multitude of subcomponent makers that supply the top-level tool makers. Some are large (like Zygo), and some are small (like Conax). Look into other companies that are involved as subsystem suppliers in the semiconductor industry.

39. Semiconductor Training The Market Selling to the Semiconductor Market OEMs: There are equipment manufacturers that make finished process equipment, and/or subsystems to finished process equipment located throughout the world. End Users: Just like with power plants, knowing the manufacturer of particular pieces of equipment will be helpful. For example, if someone is using a Applied Materials/Moore Technologies Epitaxial Barrel Reactor, we are the OEM of the calibration sensor. Just like with GE, we can provide the OEM part, or a modified/improved version if the customer is interested. End Users: Just like with power plants, if we’ve never made a sensor for a particular machine before, that does not mean that we can’t. Get a drawing, sample of a failed or new probe.

40. Semiconductor Training The Industry Insert Conax Semi Brochure Semiconductor Training The Market Semiconductor Training The Process & Equipment