2. May 8, 20012 Peripheral Design Options For USB 2.0 Solutions Dave Thompson Manager of High Speed I/O Development Agere Systems, davethompson@agere.com

3. May 8, 20013 Concept to Production with USB 2.0 w Product Prototyping Phase – Get something to work! – Advanced prototyping options – What are the best ways to optimize? u Four options will be presented w Mass Production Phase – Lowest possible overall cost structure There May Be Two “Minimums”

4. May 8, 20014 Product Prototyping Phase w Important Elements – Trusted Modular Components u USB 2.0 transceiver daughter card u PCI USB2.0 host adapter cards – Analysis tools u USB 2.0 bus protocol analyzer u Logic analyzer/traffic generators – Trusted hosts and peripherals u Multiple lab setups is desirable – Software Support u Drivers; Apps; debug tools

5. May 8, 20015 USB2.0 Prototyping In Action Agere USB2 Transceiver Daughter Card

6. May 8, 20016 Advanced USB 2.0 Prototyping Options w USB 2.0 Transceiver Macrocell – Integrating analog circuits avoids issues later – Demonstrated success at 480Mb/s signal rates w Metal programmable/Rapid turn chips – Standard digital logic options are easy – NEW!--Could include integrated transceivers w Board platforms for peripheral products – Transceiver and processor based w Board level platforms for host products – PCI based single chips or FPGA’s

7. May 8, 20017 UTMI Transceiver Macrocell w USB 2.0 (UTMI)http://developer.intel.com/technology/usb/spec.htm w Broad Industry support, discrete versions available ControlControl ControlD-D+ DLLDLL FS Interface HS Interface Shared Logic ParallelInterfaceParallelInterface DLLDLL mux BitUnstufferBitUnstufferDeseralizerDeseralizer RX Holding Reg BitStufferBitStufferSeralizerSeralizer TX Holding Reg Reg To SIE Data To USB

8. May 8, 20018 John Hyde’s Typical Implementation Serial Interface Engine Device Specific Logic Endpoint Logic … SIE Control Logic USB 2.0 Endpoint Logic Device Hardware USB 2.0 Transceiver w This is a minimal I/O Device w Many Implementation Options w Discrete versions available

9. May 8, 20019 Option 1 Building USB 2.0 Devices w Use a discrete UTMI transceiver – Has good TTM characteristics – Concentrate on product function USB 2.0 USB 2.0 Transceiver Control Data In Data Out To Bus Device Specific Logic Device Hardware UTMI Interface UTMI Interface

10. May 8, 200110 Discrete UTMI Transceiver w Has to be a parallel interface on function side w 8-bit parallel interface difficult to connect to – Has to run at 60MHz – Hard to do with FPGAs – Pay attention to TxReady, Rx Valid & ValidH w 16-bit parallel interface severely pin constrained – Package cost dwarfs silicon cost – Easy to connect to (runs at 30MHz) w Add functionality to increase silicon value – SIE, DMA, … but that limits scope

11. May 8, 200111 Discrete UTMI Transceiver

12. May 8, 200112 Option 2 Building USB2 Devices w Use a generic device controller – Has good TTM characteristics – Interfaces to product function with general purpose bus interface – Quickly enables existing product to USB 2.0 US2820 Device cntrlr Product Function USB Device Hardware General Purpose uP Interface

13. May 8, 200113 Option 3 Building USB2 Devices w Use an Enhanced Device Controller – Flexibility with integrated uP – Lower cost for high volume product USB2 Enhanced Device Controller Serial Interface Engine Microprocessor + Memory + DMA Engines Endpoint Logic … SIE Control Logic USB 2.0 Endpoint Logic Device Hardware USB 2.0 Transceiver

14. May 8, 200114 Option 4 Building USB2 Devices w Full ASIC design – Longer design/qualification times – Lowest cost for high volume product ASICASIC Serial Interface Engine Device Specific Logic +uP+memory+ DMA Engines Endpoint Logic … SIE Control Logic USB 2.0 Endpoint Logic Device Hardware USB 2.0 Transceiver

15. May 8, 200115 Decision Points for Mass Production w When to use Integrated ASIC/ASSP – Minimum board part count is important – Familiar with ASIC/ASSP design flows – Function can be added to existing ASIC/ASSP w When to use Standalone Transceiver – If integration risk is high--not so in USB 2.0 – Gives added debug points of observation – Volume may not justify integrated solution