1. .1 1999©UCB CPSC 161 Lecture 5 Prof. L.N. Bhuyan http://www.cs.ucr.edu/~bhuyan/cs161/index.html

2. .2 1999©UCB 2.9 Instruction Support for Characters °MIPS (and most other instruction sets) include 2 instructions to move bytes: Load byte ( lb ) loads a byte from memory, placing it in rightmost 8 bits of a register Store byte ( sb ) takes a byte from rightmost 8 bits of register and writes it to memory °Declare byte variables in C as “ char ” °Assume x, y are declared char, y in memory at 0($gp) and x at 1($gp). What is MIPS code for x = y ; ? lb $t0,0($gp)# Read byte y sb $t0,1($gp)# Write byte x

3. .3 1999©UCB °Must keep instructions same size, but immediate field ( addi ) only 16 bits °Add instruction to load upper 16 bits, then later instruction gives lower 16 bits load upper immediate ( lui ) sets the upper 16 bits of a constant in a register Machine language version of lui $s0,15 Contents of $s0 after executing lui $s0,15 What if constant bigger than 16 bits? 00111100000100000000 0000 0000 1111 0000 0000 0000 0000 0000 1111 oprt rs

4. .4 1999©UCB Big Constant Example °C: i = 80000; /* i:$s1 */ °MIPS Asm: 80000 ten = 0000 0000 0000 0001 0011 1000 1000 0000 two lui $s1, 1 addi $s1,$s1,14464# 0011 1000 1000 0000 °MIPS Machine Language 00111100000100010000 0000 0000 0001 00100010001 0011 1000 1000 0000 $s1: 0011 1000 1000 00000000 0000 0000 0001

5. .5 1999©UCB Branch Addressing: PC-relative °Conditional Branch: beq $t0,$t1,label address just 16 bits (2 16 ), program too small! °Option: always add address to a register PC = Register + Branch address Change register contents => bigger programs °Which register? How use conditional branch? if-else, loops Near current instruction => use PC as reg! PC-relative addressing (PC+4) +/- 2 15 words oprsrtaddress 6 bits 5 bits 16 bits I

6. .6 1999©UCB Branch Addressing: Jumps, J format °j label # go to label j has only one operand; add format large address allows large programs bright idea: address of instruction always multiple of 4 (instructions always words) => store number of word, save 2 bits Example: j exit # exit = 10000 PC = address * 4 + upper 4 bits of old PC 22500 6 bits26 bits opaddress J J

7. .7 1999©UCB Branch Addressing: PC-relative Example Loop:slt$t1,$zero,$a1# t1=9,a1=5 beq$t1,$zero,Exit# no=>Exit add$t0,$t0,$a0# t0=8,a0=4 subi$a1,$a1,1# a1=5 j Loop# goto Loop Exit:add $v0,$t0,$zero# v0=2,t0=8 0590420 80000 4903 80004 8480 80008 855 220000 802 032 80012 0320 80016 80020 Address 80020 = 80004 + 4 + 3*4 Set t1=1 if $zero < $a1

8. .8 1999©UCB Why 20,000? Branch address = PC = address * 4 + upper 4 bits of old PC Upper 4 bits of PC for 80016 = 0000 Hence new address = 20000x4 + 0000 in upper 4 bits = 80,000 = 0000 0000 0000 0001 0011 1000 1000 0000 two

9. .9 1999©UCB MIPS Addressing Modes

10. .10 1999©UCB To summarize: Need for Test 1

11. .11 1999©UCB Alternative Architecture: IA - 32 °1978: The Intel 8086 is announced (16 bit architecture) °1980: The 8087 floating point coprocessor is added °1982: The 80286 increases address space to 24 bits, +instructions °1985: The 80386 extends to 32 bits, new addressing modes °1989-1995: The 80486, Pentium, Pentium Pro add a few instructions (mostly designed for higher performance) °1997: 57 new “MMX” instructions are added, Pentium II °1999: The Pentium III added another 70 instructions (SSE) °2001: Another 144 instructions (SSE2) °2003: AMD extends the architecture to increase address space to 64 bits, widens all registers to 64 bits and other changes (AMD64) °2004: Intel capitulates and embraces AMD64 (calls it EM64T) and adds more media extensions

12. .12 1999©UCB IA-32 Overview °Complexity: Instructions from 1 to 17 bytes long one operand must act as both a source and destination one operand can come from memory complex addressing modes e.g., “base or scaled index with 8 or 32 bit displacement” °Saving grace: the most frequently used instructions are not too difficult to build compilers avoid the portions of the architecture that are slow “what the 80x86 lacks in style is made up in quantity, making it beautiful from the right perspective”

13. .13 1999©UCB IA-32 Registers and Data Addressing °Registers in the 32-bit subset that originated with 80386

14. .14 1999©UCB IA-32 Typical Instructions °Four major types of integer instructions: Data movement including move, push, pop Arithmetic and logical (destination register or memory) Control flow (use of condition codes / flags ) String instructions, including string move and string compare

15. .15 1999©UCB IA-32 instruction Formats °Typical formats: (notice the different lengths)

16. .16 1999©UCB °Instruction complexity is only one variable lower instruction count vs. higher CPI / lower clock rate °Design Principles: simplicity favors regularity smaller is faster good design demands compromise make the common case fast °Instruction set architecture a very important abstraction indeed! Summary

17. .17 1999©UCB Test 1 on 4/25/06 (Tuesday) °No conversion to machine code => No data sheet needed. Use Fig. 2.27 instead. However, you still have to remember some assembly language instructions °4 questions with two parts each with varying points => Divide your time accordingly. °1 question from general, 1 question from ch 4 and 2 questions from ch 2. °Write answers in the space provided, use back page if necessary.

18. .18 1999©UCB Topics for Test 1 °Lecture slides 1 through 6 available at http://www.cs.ucr.edu/~bhuyan/cs161/i ndex.html http://www.cs.ucr.edu/~bhuyan/cs161/i ndex.html °Book – Chapter 2 (Sections 2.1-2.6, 2.7 pp. 79-82, 2.9 °Book – Chapter 4 (Sections 4.1-4.3)