1. Edward Jezisek Brandon Autrey Edward Nowlin Renato Ortega Group 2

2. Motivation To improve the quality of ECG signals acquired from patients in an MRI environment ECG quality in MRI machines is lacking Current filter selection is confusing Current filters are imperfect New MRI scans create problems

3. Objectives To further the use of adaptive algorithms in medical practice Make patient monitors easier to use Improve the quality of ECG Signals

4. Specifications and Requirements ComponentRequirement/Specification DAC1 kHz (Diagnostic Quality) 3 Parallel Pins ADC50 kHz (Diagnostic Quality) 6 Parallel Pins ProcessorObtain Data, Perform the LMS and Output data at 150 kHz

5. Noise Contributions Electrical interference from power lines add 50 or 60 Hz power-line frequency. Muscle contraction and muscle activity can generate high frequency electromyography (EMG) noise. Motion artifacts such as movement of the electrode over the skin surface.

6. Overall System Diagram

7. Hardware

8. PCB Layout 417 components 6 layers Digital and Analog ground plane ESD/Defibrillation protection Front end amplification and filtering 4 ECG inputs and outputs 3 gradient antenna inputs ARM Cortex M4 Processor

9. Digital to Analog Converter (AD5640) 14 Bit conversion resolution Single channel 3 wire serial interface Clock rate up to 30 MHz

10. ARM Cortex M4F RISC based microprocessor 80 MHz clock speed Two 12-bit ADC modules with maximum sample rate of 1 MSPS 256 KB Flash memory Four SSI Modules 105 GPIOs including 24 shared analog input channels Single-precision Floating Point Unit (FPU)

11. PCB Schematic

12. Input from each ECG lead Removed because of NDA

13. Input from each gradient antenna Removed because of NDA

14. ESD/Defibrillation Protection In a situation when a patient goes into heart failure, a defibrillator may need to be utilized A SG75 gas discharge tube is used to short the current going into the filter when voltage exceeds 75V Clamping diodes are also used after the discharge tube to short the circuit then the voltage exceeds +/-3.3V

15. ESD/Defibrillation Protection Removed because of NDA

16. Sallen Key Filter Front end filtering is used to eliminate as much interference as possible before the analog signal is converted into a digital signal The Sallen key filter has a cut off of about 5500 rad/s or 9kHz

17. 3 rd order Sallen key filter Removed because of NDA

18. Op amp biasing and gain Op amp is biased to 1.2V to allow for proper operation of the analog to digital converter. Biasing is achieved through the use of applying a voltage to the circuit and using a voltage divider The Op amp circuit is configured to have a gain of 1.5

19. Op amp biasing and gain Op amp biasingGain Removed because of NDA

20. PCB Power Analog and Digital ground planes are separated by a CLC filter Input voltage is 5V Voltage reference is used to step voltage down to 3V for applicable components Linear regulators are used to maintain a steady voltage Digital and Analog grounds are separated by a CLC filter

21. PCB Power Removed because of NDA

22. Printed Circuit Board

23. Software

24. Linear Filters Pros: Easier to make, and is already implemented in many machines Is possible to implement with an analog system(few or no extra parts) Quick and usable for diagnostic quality devices Cheaper Cons: Requires a professional to select the correct linear filter Easy to make mistakes; if a mistake is made that can be costly in terms of receiving useless data. And in the medical profession; time is of the essence. Training is confusing Quality is lacking

25. Adaptive Filters Pros: Much better quality Less input data from user Cons: Difficulties filtering the incoming amount of data More research is required for a full implementation of it Costs more (R&D)

26. Least Mean Square Filter Example

27. Real-Time Matlab Plot Video removed due to file size limitations

28. Important Data Points

29. Analog to Digital Converter Two ADC modules that use Successive Approximation Register (SAR) architecture to deliver low-power 12-bit conversion resolution Supports 24 input channels Maximum sampling speed of 1 million samples per second Four programmable sample conversion sequencers ADC logic runs at 16 MHz 3.3 V reference voltage

30. Programmable Sequencers We used sequencer SS0 is used to sample 6 signals at once 3 ECG signals 3 Gradient signals Sample sequencer is triggered by processor interrupt Sequencer# of samplesDepth of FIFO SS311 SS244 SS144 SS088

31. Synchronous Serial Interface (SSI) Programmable data frame size from 4 and 16 bits Transmit FIFO 16 bits wide and 8 locations deep Master or slave operation Three types of frame formats MICROWIRE and Freescale SPI FSS pin is active low for duration of frame transfer Texas Instruments Synchronous Serial Interface FSS pin is pulsed for one serial clock period prior to frame transmission Three SSI modules used for the three DACs.

32. Continuous TI Synchronous Serial Frame Format

33. SPI Digital Data

34. Digital to Analog Converter Single channel 3-wire serial interface compatible with SPI SYNC, SCLK, and DIN Clock rate up to 30 MHz Reference voltage of 2.7 V AD5660AD5640 Conversion resolution16-bit14-bit Input Shift Register24-bit16-bit

35. Write Sequence for DAC

36. DAC output of 1 KHz sine wave

37. Class Diagram

38. Testing Procedures

39. Functional Testing MATLAB Used to confirm the device sends the correct signal Oscilloscope Used to read the data from the PCB, ensures correct signals sent and received Function Generator Supplies various signals that were filtered with the LMS

40. ECG Generator

41. Connections

42. ECG Signal with No Filtering

43. ECG Signal with Adaptive Filtering Video removed due to file size limitations

44. Issues Noise of about +-30 mV on the board UART is not working on PCB Difficulty selecting step size and filter order

45. Budget PartsPriceQuantityTotal Tiva C Series Dev. Board$200.002$400.00 Analog to Digital Converter (ADS8556EVM) $101.001 Components$1000Varies$1,000.00 Circuit Board$750.002$1,500.00 PCB Assembly$2500.001$2,500.00 JTAG Programmer$79.001 Total Costs$5,580.00 Total Budget$10,000.00 Extra Budget$4420.00

46. Progress

47. Work Distribution TasksGroup Member Front End DesignEdward Nowlin PCB Design and LayoutEdward Nowlin and Renato Ortega Integration of PCBBrandon Autrey and Edward Jezisek Least Mean Squares FilterEdward Jezisek MATLAB DisplayEdward Jezisek and Brandon Autrey ADCBrandon Autrey DAC and SPIEdward Jezisek and Brandon Autrey

48. Questions?