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Digital Systems I EEC 180A Lecture 15 Bevan M. Baas Tuesday, November 20, 2007.

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Presentation on theme: "Digital Systems I EEC 180A Lecture 15 Bevan M. Baas Tuesday, November 20, 2007."— Presentation transcript:

1 Digital Systems I EEC 180A Lecture 15 Bevan M. Baas Tuesday, November 20, 2007

2 EEC 180A, Fall 2007, B. Baas 2 Counter Example 3-bit counter Specification –Starting at zero, it increments by 3 –at 6, it wraps back to 0 Has a reset signal input –When reset=1, the next counter value is 0 Uses D Flip-flops 0 36 reset

3 EEC 180A, Fall 2007, B. Baas 3 Counter Example Using D FFs 000 001 010 011 100 101 110 111 011 xxx 110 xxx 000 xxx 000 Present State ABC Next State ABC Next State ABC reset=0 reset=1 State Table Two different values of reset treated as different Next States in this example 0 36 reset

4 EEC 180A, Fall 2007, B. Baas 4 Counter Example Using D FFs Combina- tional Logic reset output (= state) clk XXX 0 “current” time 000 001 010 011 100 101 110 111 reset 011 xxx 110 xxx 000 xxx 000 Present State ABC Next State ABC Next State ABC reset=0 reset=1 XXX output XXX D A,B,C 0 36 reset

5 EEC 180A, Fall 2007, B. Baas 5 Counter Example Using D FFs Combina- tional Logic reset output (= state) clk XXX000 1 “current” time 000 001 010 011 100 101 110 111 reset 011 xxx 110 xxx 000 xxx 000 Present State ABC Next State ABC Next State ABC reset=0 reset=1 XXX 000 output XXX D A,B,C 0 36 reset

6 EEC 180A, Fall 2007, B. Baas 6 Counter Example Using D FFs Combina- tional Logic reset output (= state) clk 000011 0 “current” time 000 001 010 011 100 101 110 111 reset 011 xxx 110 xxx 000 xxx 000 Present State ABC Next State ABC Next State ABC reset=0 reset=1 XXX 000 output XXX D A,B,C 011 000 0 36 reset

7 EEC 180A, Fall 2007, B. Baas 7 Counter Example Using D FFs Combina- tional Logic reset output (= state) clk 011110 0 “current” time 000 001 010 011 100 101 110 111 reset 011 xxx 110 xxx 000 xxx 000 Present State ABC Next State ABC Next State ABC reset=0 reset=1 XXX 000 output XXX D A,B,C 011 000 110 011 0 36 reset

8 EEC 180A, Fall 2007, B. Baas 8 Counter Example Using D FFs Combina- tional Logic reset output (= state) clk 110000 0 “current” time 000 001 010 011 100 101 110 111 reset 011 xxx 110 xxx 000 xxx 000 Present State ABC Next State ABC Next State ABC reset=0 reset=1 XXX 000 output XXX D A,B,C 011 000 110 011 000 110 0 36 reset

9 EEC 180A, Fall 2007, B. Baas 9 Counter Example Using D FFs Combina- tional Logic reset output (= state) clk 000011 0 “current” time 000 001 010 011 100 101 110 111 reset 011 xxx 110 xxx 000 xxx 000 Present State ABC Next State ABC Next State ABC reset=0 reset=1 XXX 000 output XXX D A,B,C 011 000 110 011 000 110 011 000 0 36 reset


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