1. 2 May 2013 Juergen Thomas: ATLAS Tracker Upgrade Module Chip-Bonding and Test Setup 1 ATLAS Tracker Upgrade: Hybrid Wire-Bonding and Test Setup at Birmingham John Wilson, Simon Pyatt, Juergen Thomas (Birmingham)

2. 2 May 2013 Juergen Thomas: ATLAS Tracker Upgrade Module Chip-Bonding and Test Setup 2 The HSIO test system HSIO (High-Speed Input Output) is a Xilinx-4-FPGA-based board designed and produced by SLAC, which is the standard for testing Tracker ASICs, Hybrids and Modules. HSIO ‘mimics’ real control systems and can capture and store output data from the ASICs, called ‘ABCn’ (‘Atlas Binary Chip – next’). Connection between HSIO and ABCb chip is via a very smaller number of LVDS channels. Interface to outer world is a normal Ethernet plug, protocol however is not standard TCP/IP. HSIO is powered by ‘laptop-brick’ power supply (48V, >50W). HSIO setup for ATLAS Tracker groups developed and maintained by RAL, both s/w and Xilinx FPGA firmware (!). RAL experts: Peter Phillips, Bruce Gallop (B’ham postgrad), Matt Warren. Our HSIO was provided by Peter Phillips without pay (presumably on long- term loan)

3. 2 May 2013 Juergen Thomas: ATLAS Tracker Upgrade Module Chip-Bonding and Test Setup 3 Windows7-PC: Running ROOT. Red network cable connects the HSIO. HSIO: At Birmingham ! PB8

4. 2 May 2013 Juergen Thomas: ATLAS Tracker Upgrade Module Chip-Bonding and Test Setup 4 Software installation for Test Setup (1) HSIO is configured and controlled by the SCTDAQ software, developed by RAL, which resides on SVN at CERN under (restricted access): https://svnweb.cern.ch/cern/wsvn/atlasupstrip/software/sctdaq Very detailed setup instructions provided by RAL and Freiburg colleagues: https://twiki.cern.ch/twiki/bin/viewauth/Atlas/StripsUpgradeDAQFreiburg https://twiki.cern.ch/twiki/bin/viewauth/Atlas/HSIODAQSetupOperation Installation in Poynting lab on new PC with 1TB disk. Running on Windows7, to follow majority of (all?) other institutes running HSIO. HSIO connected via extra ethernet port (extra dual-ethernet card in PC) Root v5.34 installation on Windows7 exactly as described on Root website, using ‘Microsoft Visual Studio Express 2010’ (which is free, though requires registration after 30 days). We also have a full ‘Visual Studio Professional’ if required, via uni licence. Other tools to interface TCP/IP called WinPCAP and Whireshark also needed to be installed. Xilinx software provided by RichardS.

5. 2 May 2013 Juergen Thomas: ATLAS Tracker Upgrade Module Chip-Bonding and Test Setup 5 Software installation for Test Setup (2) After some twitching (ie don’t use vc10 config file, but let Visual Studio convert the vc9 file), compilation works. Adjusted network port to match SCTDAQ config HSIO can be accessed from SCTDAQ, using Root command:.x Stavelet.cpp

6. 2 May 2013 Juergen Thomas: ATLAS Tracker Upgrade Module Chip-Bonding and Test Setup 6 Software installation for Test Setup (2)

7. 2 May 2013 Juergen Thomas: ATLAS Tracker Upgrade Module Chip-Bonding and Test Setup 7 The ABC-N Testboard... This carries a real ABC-n prototype chip ! Power supply via a DSub-9 connector, using our TTI lab power supply Connection to HSIO via flat-ribbon cable with some swapped channels We have a ABC-N testboard, but I very naively connected it with a flat- ribbon cable without swapped input, and also turned it around (!). This likely broke the board (draws 360 mA instead of 480 mA), possibly a blown-up voltage regulator. Our testboard is under investigation at RAL, hopefully can provide a replacement, or we can try to replace power regulator ourselves. Now have properly-made cables thanks to SimonP !

8. 2 May 2013 Juergen Thomas: ATLAS Tracker Upgrade Module Chip-Bonding and Test Setup 8 The New Wire-Bonder: Hesse BJ820 (1) A wire-bonder ultrasonically welds the tiny wires between the ASICs and the surrounding board. Our old wire-bonder (Delvotek) didn’t have the necessary specs (ie working area) to carry-out bonding work of new Tracker hybrids With the efforts of many people in the group (PaulN, John, SimonP etc), a new wire-bonder model ‘Hesse & Knipps BJ820’ has been purchased, delivered in Nov ‘12. This is not a small-value item. Old bonder has been moved to a lab outside physics. Simon is in very active contact with the manufacturer and ATLAS colleagues esp at Cambridge and Liverpool to iron-out some initial issues, ie control s/w version differences. The new wire-bonder is now up and running in our clean-room in the Poynting basement. See following video by Simon !

9. 2 May 2013 Juergen Thomas: ATLAS Tracker Upgrade Module Chip-Bonding and Test Setup 9 The New Wire-Bonder: Hesse BJ820 (2) Simon’s video: http://epweb2.ph.bham.ac.uk/user/pyatt/BJ820Videos/VID 00016.MP4 http://epweb2.ph.bham.ac.uk/user/pyatt/BJ820Videos/VID 00016.MP4

10. 2 May 2013 Juergen Thomas: ATLAS Tracker Upgrade Module Chip-Bonding and Test Setup 10 Hybrid Production in a Nutshell In a nutshell, the following main steps are necessary to produce the hybrid: Position and glue ASICs onto the hybrid structure: R&D at Liverpool found that manual gluing using mechanical jigs works ok (machines carrying-out the automated process are _not_ cheap). 20 ASICs go onto one hybrid structure. Followed by ‘Curing’ process, ie wait to let it dry, >24hours with vacuum. Mount panel (containing 8 hybrids) into the wire-bonder and let bonder do its work If the board is ok under visual inspection, power it up and check electrical connection, and general functionality, esp measure the noise levels. This is where HSIO comes into the game. Use environmental chamber for test at nominal operation temperature (ie cold). Current idea (after gaining more knowledge with single-chip ABC-N testboard) is to move HSIO into the clean-room, with long ethernet cable to the PC outside. Also set-up eg VNC on laptop to have remote access to the HSIO also from inside the clean-room (ie to find initial connection problems)

11. 2 May 2013 Juergen Thomas: ATLAS Tracker Upgrade Module Chip-Bonding and Test Setup 11 Images from our Clean-Room (1) Placing ‘Glass-ASICs’ Placing-frame and vacuum jig. How glue is applied.

12. 2 May 2013 Juergen Thomas: ATLAS Tracker Upgrade Module Chip-Bonding and Test Setup 12 Images from our Clean-Room (2) Placing ASICs: 20 in one go. Note placing jigs connected to vacuum. The New Wire-Bonder (with Expert)

13. 2 May 2013 Juergen Thomas: ATLAS Tracker Upgrade Module Chip-Bonding and Test Setup 13 Next Steps Many items brought-over from Liverpool, RAL and Glasgow: Glass mock-ups for placing and gluing tests, along with various jigs, weights Half-populated hybrids for wire-bonding tests ASICs: A number of ABC-N250 dies (‘last generation’, but the real thing) Set-up HSIO test for ABC-N testboard (replacement or repair), learn more about SCTDAQ software (esp configurations) Kick-off meeting of Work Packages 3 and 5 (WP3/WP5) happened on Monday at B’ham

14. 2 May 2013 Juergen Thomas: ATLAS Tracker Upgrade Module Chip-Bonding and Test Setup 14 Back-up Slides

15. 2 May 2013 Juergen Thomas: ATLAS Tracker Upgrade Module Chip-Bonding and Test Setup 15 The New Wire-Bonder: Hesse BJ820 (3)