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The MSP430xxxx Department of Electrical and Computer Engineering

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Presentation on theme: "The MSP430xxxx Department of Electrical and Computer Engineering"— Presentation transcript:

1 The MSP430xxxx Department of Electrical and Computer Engineering
ECE 2560 The MSP430xxxx Department of Electrical and Computer Engineering The Ohio State University ECE Lecture 1

2 Today The MSP430 Microcontroller The Physical Chip/Processor
What is a microcontroller The Physical Chip/Processor Memory structure Addressing Modes ECE Lecture 1

3 The MSP430 Microcontroller
What is a microcontroller? A microprocessor with memory and I/O port support directly on chip. It also includes controllers for interfaces such a JTAG, SPIO, A-to-D conversion on board. With the support on chip, microcontrollers are very important in design and implementation of embedded systems. ECE Lecture 1

4 The MSP430 A von-Neumann style architecture Key features
Ultralow-power architecture 0.1 uA RAM rentention 0.8 uA real-time clock mode 250 uA/MIPS active High-performance A-to-D conversion 12-bit or 10-bit ADC, 12-bit dual-DAC 200 ksps 16-bit RISC processor features Large Register file Compact code design 27 core instructions 7 addressing modes ECE Lecture 1

5 The MSP430 Block Diagram of internal structure – high level
ECE Lecture 1

6 MSP430 Memory structure – logical 16-bit addressable
64K bytes (64KB) Amount of Flash/ROM and RAM vary by device Last 16 words of Flash/ROM used for the Interrupt Vector Table I/O is memory mapped ECE Lecture 1

7 Memory data organization
Bytes can be at even or odd addresses Words are only at even addresses The low byte of a word is at the even address. The high byte of a word is at the odd address ECE Lecture 1

8 Memory dump Big endian and little endian (the 430)
Little endian is more logical but… (pg 27 of text) If memory is dumped by the debugger Addresses increase from low to high across a line Display is low-order-byte high-order-byte so $ is displayed $34 $12 bytes look reversed but consistent with their address Can be avoided by getting the dump in words versus bytes. (Will see this later in examples) (Code composer supports this) ECE Lecture 1

9 The MSP430 CPU Incorporates features to support modern programming techniques (Don’t need go to’s) The features Calculated branching Table processing 27 RISC instructions 7 addressing modes All instructions use all the addressing modes Full register access Single cycle register operations (RISC) Direct memory-to-memory transfers Constant generator provides most used values ECE Lecture 1

10 The MSP430 data path There are 16 registers Note bus structure
Contents are 16-bits User has access to all registers 4 registers are special purpose Note bus structure MDB – Memory Data Bus MAB – Memory Address Bus Also have 2 internal bussed to deliver 2 operand to ALU Diagram is called the datapath of the processor See Users Guide ECE Lecture 1

11 General purpose registers
R4 thru R15 Registers are indistinguishable Can be used as Data Registers Address Registers Index values Can be accessed with byte or word instructions There is Register-Byte operation and Byte-Register operation – covered later ECE Lecture 1

12 Addressing Modes MSP430 addressing modes
Addressing mode – the way in which the operand(s) of an instruction are accessed, i.e., the effective addresses are calculated. 7 modes supported Register Mode – (Rn) – operands are in registers Immediate Mode – #N – The operand is part of the instruction Instructions have format OPCODE #OPERAND Absolute Mode – &ADDR – The address of the operand is given by the word following the opcode Instructions have format OPCODE &ADDRESS ECE Lecture 1

13 Addressing Modes (2) Remainder of addressing mode
Indexed Mode – X(Rn) – (Rn+X) points to (is the address of) the operand. The value X is the next word in the instruction stream after the OPCODE. Symbolic Mode – ADDR – (PC+X) points to the operand. X is the next word. Indirect Register Mode – Rn is used as a pointer to the operand. Indirect Autoincrement - Rn is used as a pointer to the operand. After access Rn is incremented by 1 for .B instructions and by 2 for .W instructions ECE Lecture 1

14 Register Mode Addressing
Note gives action if only a byte Form is MOV.B R1,R2 ECE Lecture 1

15 Immediate Mode addressing
Operand is part of instruction Destination can be a register or a memory location. If a register instruction is only 2 words ECE Lecture 1

16 Absolute Mode Addressing
One of operands can be a register ECE Lecture 1

17 Absolute Mode Addressing (2)
Effect ECE Lecture 1

18 Indexed Mode Addressing
Summary ECE Lecture 1

19 Indexed Mode Addressing (2)
Action ECE Lecture 1

20 Symbolic Mode Addressing
Summary ECE Lecture 1

21 Symbolic Mode Addressing (2)
Action ECE Lecture 1

22 Indirect Register Mode
Summary ECE Lecture 1

23 Indirect Register Mode (2)
Action ECE Lecture 1

24 Indirect Autoincrement Mode
Summary ECE Lecture 1

25 Indirect Autoincrement Mode (2)
Action ECE Lecture 1

26 Assignment The MSP 430 Users Guide has been added to the course webpage. The information of this lecture can be found there (section 3.3). Quiz next week – (again) Some 430 questions ECE Lecture 1


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