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Ivan Peric, Monolithic Detectors for Strip Region 1 CMOS periphery.

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Presentation on theme: "Ivan Peric, Monolithic Detectors for Strip Region 1 CMOS periphery."— Presentation transcript:

1 Ivan Peric, Monolithic Detectors for Strip Region 1 CMOS periphery

2 Ivan Peric, Monolithic Detectors for Strip Region 2 CMOS periphery: detector types Embedded pixel sensor With readout cells on the periphery With readout cells in the active region With continuous readout With trigger readout Segmented strip detector with hit-buffer based multiplexing With/without digital z encoding Segmented strip detector with lossy constant-delay-multiplexing (readout latency only 80ns) With/without digital z encoding

3 Ivan Peric, Monolithic Detectors for Strip Region 3 HVCMOS sensor types N-Well CMOS N-Well Variant 1 PMOS not isolated Variant 2 PMOS isolated with a deep P-well Type A – smart diodeType B – HVMAPS CMOSN-Well CMOS PMOS must be isolated with a deep P-well

4 Ivan Peric, Monolithic Detectors for Strip Region 4 Readout types: in-pixel hit processing (embedded pixel sensor) RAM/ROM Hit flag Priority scan logic Time stampData bus Read RowAddr + TS One RO cell /pixel Shift register in-pixel hit processing Matrix size M x N Output data width ln(N)=n+TS Periphery ~ 1% - 1.5% Readout cell function – time stamp is stored when hit arrives Hit data are stored until the readout Priority logic controls the readout order RO cell size in 0.18um ~ 7um x 40um (with comparator and thr-tune DAC) Without comparator: 7um x 20um Example: Pixel size 80um x 320um Chip size: ~ 2cm x 2cm Number of pixels: 256 x 64 Size of periphery with comparators: 2cm x 224um (1.12%) Size of periphery without comparators: 2cm x 112um (0.6%) Comparator and Thr tune DAC Pixel contains a charge sensitive amplifier and optionally a discriminator with a threshold tune DAC CSA Comparator Concept: Every pixel has its own readout cell, placed on the chip periphery

5 Ivan Peric, Monolithic Detectors for Strip Region 5 Readout types: in-pixel hit processing with trigger (embedded s.) RAM/ROMHit flag Priority scan logic Time stamp Data bus Read RowAddr + TS One RO cell /pixel Shift register In-Pixel hit processing Matrix size M x N Output width n+TS Periphery ~ 1.5% Delayed TS and trigger Readout cell function – time stamp is stored when hit arrives The stored time stamp is compared with the current time stamp If trigger arrives with the correct latency, the triggered hit flag is set Priority logic controls the readout order Estimated cell size in 0.18um without comparator ~ 7um x 40um Example: Pixel size 80um x 320um Chip size: ~ 2cm x 2cm Number of pixels: 256 x 64 Size of periphery without comparator: 2cm x 224um (1.12%) Triggered hit flag Pixel contains a charge sensitive amplifier and a discriminator with threshold tune DAC CSA Comparator Concept: Every pixel has its own readout cell, placed on the chip periphery

6 Ivan Peric, Monolithic Detectors for Strip Region 6 In-pixel hit processing with the RO placed in active area RAM/ROMHit flag Priority scan logic Time stamp Data bus ReadDelayed TS and trigger The implementation of the whole readout in active region requires deep P-Well No digital periphery required Triggered hit flag N-Well CSA Comparator Concept: Every pixel has its own readout cell, placed in the pixel itself (active area) Smart diode implementation

7 Ivan Peric, Monolithic Detectors for Strip Region 7 In-pixel hit processing with the RO placed in active area N-Well HVMAPS implementation

8 Ivan Peric, Monolithic Detectors for Strip Region 8 Segmented strip detector with hit-buffer based multiplexing

9 Ivan Peric, Monolithic Detectors for Strip Region 9 Segmented strip detector with hit-buffer based multiplexing

10 Ivan Peric, Monolithic Detectors for Strip Region 10 Segmented strip detector with hit-buffer based multiplexing

11 Ivan Peric, Monolithic Detectors for Strip Region 11 Segmented strip detector with hit-buffer based multiplexing

12 Ivan Peric, Monolithic Detectors for Strip Region 12 Segmented strip detector with hit-buffer based multiplexing

13 Ivan Peric, Monolithic Detectors for Strip Region 13 Segmented strip detector with hit-buffer based multiplexing

14 Ivan Peric, Monolithic Detectors for Strip Region 14 Segmented strip detector with hit-buffer based multiplexing 1 Segmented strip Output width 1 + TS Small periphery (<1%) Pad-area dominates Shift register CSA Comparator Hit Pixel synch 25ns clock FIFO Shift reg. TS HitTS ff srsr Ck hit RAM Full flag Write prio. logic Data In Hit EoC buffer Read prio. logic

15 Ivan Peric, Monolithic Detectors for Strip Region 15 Segmented strip detector with hit-buffer based multiplexing n Segmented strip with digital row encoding Output width n+ TS Small periphery (<1%) Pad-area dominates Scrambled address when more than a hit/column A few cells /column Shift register CSA Comparator Address ROM AddressHit synch 25ns clock FIFO Shift reg. TS AddressHitTS ff srsr Ck Address Sync Address, hit hitRAM Full flag Write prio. logic Data In Data bus EoC buffer Hit Read prio. logic Pixel EoC buffer Read

16 Ivan Peric, Monolithic Detectors for Strip Region 16 Scheme that copes with hit multiplicity Segmented strip with digital row encoding Output width n+ TS Small periphery (<1%) Pad-area dominates Scrambled address when more than two hits/column Shift register CSA Comparator AddressDownHit Pixel AddressUp nnnn

17 Ivan Peric, Monolithic Detectors for Strip Region 17 Column mapping Multiple hits/column unlikely Multiple hits/column possible due to charge sharing

18 Ivan Peric, Monolithic Detectors for Strip Region 18 Segmented strip detector with lossy constant-delay-multiplexing ACDB Output 1 Output 2

19 Ivan Peric, Monolithic Detectors for Strip Region 19 Segmented strip detector with lossy constant-delay-multiplexing ACDB Output 1 Output 2

20 Ivan Peric, Monolithic Detectors for Strip Region 20 Segmented strip detector with lossy constant-delay-multiplexing ACDB Output 1 Output 2 012

21 Ivan Peric, Monolithic Detectors for Strip Region 21 Segmented strip detector with lossy constant-delay-multiplexing ACDB Output 1 Output 2 012 A B

22 Ivan Peric, Monolithic Detectors for Strip Region 22 Segmented strip detector with lossy constant-delay-multiplexing ACDB Output 1 Output 2

23 Ivan Peric, Monolithic Detectors for Strip Region 23 Segmented strip detector with lossy constant-delay-multiplexing ACDB Output 1 Output 2

24 Ivan Peric, Monolithic Detectors for Strip Region 24 Segmented strip detector with lossy constant-delay-multiplexing ACDB Output 1 Output 2 010

25 Ivan Peric, Monolithic Detectors for Strip Region 25 Segmented strip detector with lossy constant-delay-multiplexing ACDB Output 1 Output 2 010 C

26 Ivan Peric, Monolithic Detectors for Strip Region 26 Segmented strip detector with lossy constant-delay-multiplexing ACDB Output 1 Output 2

27 Ivan Peric, Monolithic Detectors for Strip Region 27 Segmented strip detector with lossy constant-delay-multiplexing ACDB Output 1 Output 2

28 Ivan Peric, Monolithic Detectors for Strip Region 28 Segmented strip detector with lossy constant-delay-multiplexing ACDB Output 1 Output 2 012

29 Ivan Peric, Monolithic Detectors for Strip Region 29 Segmented strip detector with lossy constant-delay-multiplexing ACDB Output 1 Output 2 012 A D

30 Ivan Peric, Monolithic Detectors for Strip Region 30 Segmented strip detector with lossy constant-delay-multiplexing ACDB Output 1 Output 2

31 Ivan Peric, Monolithic Detectors for Strip Region 31 Segmented strip detector with lossy constant-delay-multiplexing 1 Segmented strip Output width 8x8 Constant delay Small periphery (<1%) Pad-area dominates Hit loss when more than 8 hits/BC 8x8 Pipeline structure f a f a f a f f a a f ff ffm 1 FF inc Addr 3-bit adder en chan in 8 88 8 3 3 3 3 3 3 m Addr en in 8 inc 1 Demux with en Chan0-14 Chan15 Chan16-30 ROM FFs: 2304

32 Ivan Peric, Monolithic Detectors for Strip Region 32 Segmented strip detector with lossy constant-delay-multiplexing n Segmented strip with binary row encoding Output width 8x(8+n) Constant delay Small periphery (<1%) Pad-area dominates Hit loss when more than 8 hits/BC 8x8 Pipeline structure f a f a f a f f a a f ff ff 1 inc en chan 88 8 3 3 3 3 3 3 en inc 1 Chan0-14 Chan15 Chan16-30 f n ff addr nn n n in f n ff nn n FFs: 6912

33 Ivan Peric, Monolithic Detectors for Strip Region 33 Segmented strip detector with analog row encoding CSA Comparator Analog address-encoding Segmented strip with analog row encoding Analog z-encoding Output width m No periphery

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