1. Chapter 3 DC and Parametric Measurements

2. © 2000 R. J. Fink n Continuity – Purpose of Continuity Testing n ATE to Test Head connection

3. © 2000 R. J. Fink – Purpose of Continuity Testing n Electromechanical relays Sinlge Pole, Single Throw (SPST) Sinlge Pole, Double Throw (SPDT) Double Pole, Double Throw (DPDT) Contact Wiper Coil

4. © 2000 R. J. Fink n Continuity – Continuity Test Technique n On chip protection diodes – Protect input and output from Electrostatic Discharge (ESD) and other overvoltage – Pins have either one or two reverse biased diodes

5. © 2000 R. J. Fink n Continuity – Continuity Test Technique n Force current - measure voltage – DUT power supplies are grounded – Current level is usually between 100uA and 1mA – Diodes connected to the positive supply - current forced in – Diodes connected to the negative supply - current forced out – Output diode voltage drop usually is between 550mV and 750mV – If tester does not see diode voltage drop or the current reaches its voltage clamp, the test fails

6. © 2000 R. J. Fink n Continuity – Serial vs. Parallel Continuity Testing n Serial is one pin at a time – Test time intensive n Parallel can not see pin to pin shorts – Alternating odd and even pin parallel test n Analog parallel per-pin measurement is not available in some testers – Single current source and volt meter can be used one pin at a time n Digital per-pin measurement is available, but may introduce noise into sensitive analog circuit

7. © 2000 R. J. Fink n Leakage Currents – Purpose of Leakage Testing n Good design should have leakage current of less than 1uA n Detects poorly processed integrated circuits – Improper operation in customer end application n Detect weak devices – Initially function but eventually fail after unacceptably short lifetime (Infant mortality)

8. © 2000 R. J. Fink n Leakage Currents – Leakage Test Technique n Force DC voltage - measure small current – Typically measured twice input voltage equal to positive supply input voltage set to ground or negative supply – Input current high (IIH) and input current low (IIL) – Digital and analog inputs n Output leakage current (IOZ) – Measured same as IIH & IIL output pin must be placed in a high impedance (HIZ) state using test modes

9. © 2000 R. J. Fink n Leakage Currents – Serial vs. Parallel Leakage Testing n Serial is one pin at a time – Test time intensive – Less possibility of errors n Leakage currents can flow from pin to pin – Alternating odd and even pin parallel test is recommended n Again, analog parallel per-pin measurement is not available in some testers – Single voltage source and current meter can be used one pin at a time n Again, digital per-pin measurement is available, but may introduce noise into sensitive analog circuit

10. n Power Supply Currents – Importance of Supply Current Tests n Fast method for determining catastrophic failure – Large current draw from power supplies – Tests are run early in test protocol to weed out defective chips without wasting valuable test time – Older technologies easier to diagnose n Customer specific application characteristic – Battery operated instruments like a cellular phone require minimal current draw by electronics

11. n Power Supply Currents – Test Techniques n Basic test is simple – Testers have the ability to measure current draw from power supplies (Idd and Icc) n Actual test is never basic – Test conditions must be clearly identified in test plan power up mode, standby mode, normal operational mode digital supply (Iddd and Iccd) and analog supply (Idda and Icca) measured separately – Worst case requires complete characterization

12. – Test Techniques - cont. – Multiple power supply pins designers may need to know the current flow into each pin – Settling time 5 to 10 milliseconds in active mode hundreds of milliseconds to stabilize to within 1mA

13. n DC References and Regulators – Voltage Regulators n High voltage input - regulated lower voltage output – Output voltage simple voltmeter reading – Output voltage regulation ability of regulator to maintain specific output under load – Dropout voltage minimum input voltage before output drops below specified level – Input regulation ability of regulator to maintain steady output with a range of input voltages

14. n DC References and Regulators – Voltage References n Low power voltage regulators – Not always accessible from external pin test engineer may need to request test modes to test references – May not have a separate specification in the data sheet – DC reference test modes allow the program to trim the DC references for more precise device operation

15. Load regulation is the capability to maintain a constant voltage (or current) level on the output channel of a power supply despite changes in the supply's load (such as a change in resistance value connected across the supply output) Load regulation of a constant-voltage source is defined by the equation: For a constant-current supply, the above equation uses currents instead of voltages, and the maximum and minimum load values are when the largest and smallest specified voltage across the load are produced. Load Regulation

16. V max_load = voltage at maximum load. The maximum load is the one that draws the greatest current,(never short circuit); V min_load = voltage at minimum load. The minimum load is the one that draws the least current, V nom_load = voltage at the typical specified load. For a constant-current supply, the above equation uses currents instead of voltages, and the maximum and minimum load values are when the largest and smallest specified voltage across the load are produced. Load Regulation

17. Line regulation is the capability to maintain a constant output voltage level on the output channel of a supply despite changes to the input voltage level. In linear regulators, the output voltage is affected by the input voltage. Line regulation measures how much it is affected: Line Regulation

18. Line Regulation Example 1. Find the difference between the initial voltage and the maximum fluctuation. – If the initial voltage was 25 and the maximum measurement was 28, then the difference in voltage would be 3 volts. 2. Divide the change in voltage by the initial voltage. – Using the above example, 3/25=.12 3. Multiply the number obtained in Step 2 by 100. – This will give you the line regulation percentage for the circuit or current you are measuring. Ex:.12 x 100 = 12%

19. Problem 1 - 10 Minute – A) The output of a 9-V voltage regulator varies from 8.95 V under no-load condition to 8.15 V under a 15 mA maximum rated load current. What is its load regulation? – B) The output of a 9-V voltage regulator varies from 8.65 V to 8.22 V when the input voltage is changed from 14 V to 6 V under a maximum load condition of 5 mA. What is its line regulation? – C) A 9-V voltage regulator is rated to have a load regulation of 15 mV/mA for a maximum load current of 10 mA. Assuming a no-load output voltage of 9-V, what is the expect output voltage at the maximum load current?

20. Problem 1 - Solution

21. n DC References and Regulators – Trimmable References n Allows quality of product to be enhanced during testing through fuses internal to the device – The only aspect of testing that adds value to the device n Fuses, Zener diodes or EEPROM register bits – Fuses and Zener diodes are blown by forcing a controlled current through them fuses blow to an open circuit diodes blow to a short circuit n Laser trimming – On-Chip resistor are trimmed to increase resistance – Also used to trim gain and offset of analog circuits n Trimming is sometimes performed after packaging to account for packaging effects

22. Laser trimming © 2006 G.O. Ducoudray R=R+r R=  W/L

23. n Impedance Testing – Input Impedance n Very common specification for analog inputs – Force two voltages - measure differences in current single voltage / current is not sufficient to eliminate bias current and unknown termination voltages data sheet will list the appropriate range for voltage – Input impedance is equal to change in voltage divided by the change in current – Alternative method: force two controlled currents and measure the voltages used in cases where low input impedance would cause excessive current flow into the device data sheet will list the appropriate ranges of current

24. n Impedance Testing – Output Impedance n Typically much lower than input impedance – Measured with a force current measure voltage method – Differential Impedance Measurements n Force two differential voltages and measure the differential current change

25. n DC Offset Measurements – Output Offset Voltage n The difference between the devices ideal output voltage and its actual output voltage n Basic test is fairly simple n Difficulties – AC components or noise riding on the DC signal – Requires filtering analog low pass filter digital averaging which functions like a low pass filter – ATE parasitic capacitance causes some op amps to oscillate may need a buffer amplifier

26. © 2000 R. J. Fink n DC Offset Measurements – Input Offset Voltage n Output offset voltage referenced back to its input – Output offset voltage divided by the gain of the circuit definition assumes that the offset is all attributed to the input, when in reality, the offset could be caused by internal factors as well – Single Ended, Differential, and Common Mode Offsets – Single ended offsets are measured relative to ideal voltage – Differential offset is the difference between two outputs of a differential circuit. – Common mode offset is the average voltage level at two outputs of a differential circuit compared to an ideal common mode voltage

27. © 2000 R. J. Fink n DC Gain Measurements – Closed Loop Gain n Single input – Change in output divided by the change in input – Use a voltmeter to measure output input should be stable to within 1mV may need testers high accuracy voltmeter to measure the values n Differential input – Change in differential output divided by change in differential input – DC offsets at the input are cancelled out – Use a differential voltmeter

28. © 2006 G.O. Ducoudray Problem 2 - 5 Minute – Given a fully-differential amplifier with a nominal gain of +10 V/V. SRC1 is set to 1.6 V and SRC2 is set to 1.4 V. An output voltage of 2.53 V is measured at OUTP and an output voltage of 0.48 V is measured at OUTN. Then SRC1 is set to 1.4 V and SRC2 is set to 1.6 V and output voltage of 0.49 V is measured at OUTP and output voltage of 2.52 V is measured at OUTN. Using the measured data provided, what is the differential gain of this circuit?

29. Problem 2 - Solution – With SRC1 set to 1.6 V and SRC2 set to 1.4 V, you get a differential input of 200 mV. – An output voltage of 2.53 V is measured at OUTP and an output voltage of 0.48 V is measured at OUTN, the differential output is 2.05 V. – With SRC1 is set to 1.4 V and SRC2 is set to 1.6 V you have an input differential level of –200 mV. – An output voltage of 0.49 V is measured at OUTP and an output voltage of 2.52 V is measured at OUTN, the differential output voltage is thus -2.03 V. © 2006 G.O. Ducoudray

30. n DC Gain Measurements – Open Loop Gain n Defined as the amplifier gain with no feedback path from the output to the input. – Difficult to test since op amp gains can be very high measured using a second op amp in the feedback path nulling amplifier can also be used to measure the input offset voltage V O-NULL VM DUT Tester SRC1 V SRC1 Tester V MID R3R3 R2R2 R1R1 R1R1 R3R3 Nulling Amp C V - DUT V + DUT V O-DUT © 2006 G.O. Ducoudray

31. n DC Power Supply Rejection Ratio – DC Power Supply Sensitivity (PSS) n Measure of the ability of a circuit to maintain a steady output voltage while the power supply voltage changes slightly VOVO VM DUT Tester x10 Amplifier (On-Chip V MID ) SRC1 V DD Tester VOUT V MID VIN 1 k  10 k  VMID V DD V SS © 2006 G.O. Ducoudray

32. n DC Power Supply Rejection Ratio – DC Power Supply Rejection Ratio (PSRR) n PSS of the circuit divided by the gain of the circuit in its normal mode of operation n PSRR| db = 20 log PSS/|G| © 2006 G.O. Ducoudray

33. Problem 3 - 10 Minutes – The input of the x10 amplifier is connected to a voltage source forcing 0.25 V. The power supply is set to 4.9 V and a voltage of 2.52 V is measured at the output of the amplifier. The power supply voltage is then changed to 5.1 V and the output measurement changes to 2.56 V. What is the PSS? What is the PSRR if the measured gain is 9.8 V/V? © 2006 G.O. Ducoudray

34. Problem 3 - Solution – Please note changes in text p. 3-31 Solution to problem should be 9mV/V and -40.91 dB © 2006 G.O. Ducoudray

35. n DC Common Mode Rejection Ratio – CMRR of Op Amps n A differential circuit’s ability to reject a common mode signal at its inputs n There are two circuits used to measure CMRR – Resistor matching is a major source of error. © 2006 G.O. Ducoudray

36. Op amp CMRR Test Setup VOVO VM DUT Tester SRC1 V SRC1 Tester VOUT V MID IN  RFRF RFRF IN+ VMID Op Amp (On-Chip V MID ) RIRI RIRI © 2006 G.O. Ducoudray

37. CMRR Test Setup using Nulling Amplifier V O-NULL VM DUT Tester SRC1 V SRC1 Tester V MID R3R3 R2R2 R1R1 R1R1 R3R3 Nulling Amp C © 2006 G.O. Ducoudray

38. n DC Common Mode Rejection Ratio – CMRR of Differential Gain Stages – Circuits that use op amps to perform a function – The CMRR of the op amp is not as critical as the CMRR of the circuit. – Resistor matching is critical in these circuits n Difference between chip CMRR and circuit CMRR? – Chip CMRR - the resistors are on the DIB. – Circuit CMRR - the resistors are on the DUT. © 2006 G.O. Ducoudray

39. CMRR of Differential Gain Stages VOVO VM DUT Tester Differential x10 Amplifier ( V MID Generated On-Chip) SRC1 V SRC1 Tester VOUT V MID IN  1 k  10 k  IN+ 1 k  10 k  © 2006 G.O. Ducoudray

40. n Comparator DC Tests – Input Offset Voltage n Differential input voltage causes a comparator to switch from one output state to the other. – Differential input voltage is ramped from one voltage to another to find the point at which the comparator changes state. VOVO VM DUT Tester SRC1 V IN+ Tester VOUT IN  IN+ Comparator V IN VM SRC2 V IN - © 2006 G.O. Ducoudray

41. n Comparator DC Tests – Threshold Voltage n Slicer circuit – Fixed reference voltage supplied to one input of a comparator – The input offset voltage is replaced by the single-ended specification, threshold voltage VOVO VM DUT Tester SRC1 V IN+ Tester VOUT IN+ Slicer V IN VM V TH © 2006 G.O. Ducoudray

42. n Comparator DC Tests – Hysteresis n The difference in threshold voltage between a rising input test condition and a falling input condition – May or may not be a design feature n Input offset voltage and hysteresis may change with different common mode input voltages © 2006 G.O. Ducoudray

43. n Voltage Search Techniques – Binary Searches vs. Step Searches n Ramping input voltages until an output condition is met is called a ramp or step search. – Very time consuming, not well suited for production testing. n Binary searches use successive approximation algorithms If you are looking for a transition between 1.45V and 1.55V, the comparator input is set to 1.5V and the output is observed. If the output is high, then the input is increased by one quarter of the 100 mV search range (25mV) to try to make the output go low. Once the output goes low, the input is adjusted by one eighth of the search range (12.5mV) and the process is repeated until the desired resolution is attained. Does not work well in the presence of hysteresis. © 2006 G.O. Ducoudray

44. n Voltage Search Techniques – Linear Searches n Very fast n Using two input values, two output values can be measured. – Using the linear equation: y = m * x + b, the zero crossing values can be calculated. n Iterative linear searches are used to achieve the desired accuracy. © 2006 G.O. Ducoudray

45. n DC Tests for Digital Circuits – IIH / IIL n Mentioned earlier under leakage currents – Data sheets list several specification for digital inputs and outputs – Digital I/O lines can also have input leakage specifications when they are set in a high impedance (HIZ) mode. – VIH / VIL (input high voltage and low voltage) n Threshold voltage for digital inputs – Tested using a binary or step search – Force levels as a go-nogo test to identify VIH / VIL threshold failures, rerunning the go-nogo test at a looser test limit will reveal the failure. © 2006 G.O. Ducoudray

46. n DC Tests for Digital Circuits – VOH / VOL n VOH is the minimum output voltage in the high state n VOL is the maximum output voltage in the low state – Usually a verified value not a measured value – Tested using a go-nogo test – IOH / IOL n VOH and VOL are guaranteed with specified load currents (IOH and IOL) – When output is high, the tester must pull current out of the DUT. – When the output is low, the tester must force current into the DUT. © 2006 G.O. Ducoudray

47. n DC Tests for Digital Circuits – IOSH and IOSL Short Circuit Current n Digital outputs often have output short circuit protection – If the output is shorted directly to ground or to power, the amount of current flowing into or out of the pin is limited to IOSH and IOSL © 2006 G.O. Ducoudray

48. n Summary – DC tests are very easy to define and understand – Actual testing is usually much more difficult than it looks. n A DC offset of 100mV is easy to measure with an accuracy of +/- 10mV - very difficult to measure with an accuracy of 1uV. n Accuracy and repeatability are often the most time consuming problems faced by an analog test engineer. © 2006 G.O. Ducoudray