1. Adders, subtractors, ALUs
ECE 3110: Introduction to Digital Systems Chapter 6 Combinational Logic Design Practices
Adders, subtractors, ALUs

2. Prev… XOR (2-level, 3-level) Parity Circuits (Odd, even) Comparators
Equivalent symbols
XNOR
Parity Circuits (Odd, even)
Daisy chain
Tree
Comparators
Iterative
Parallel

3. Adders/Subtractors Half Adder Full Adder Ripple Adder Full Subtractor
Ripple Subtractor
Adder/ Subtractor Circuit

4. Half Adder: adds two 1-bit operands
Truth table : X Y HS=(X+Y) CO X
H S Y CO

5. Full Adders: provide for carries between bit positions
Basic building block is “full adder”
1-bit-wide adder, produces sum and carry outputs
Truth table:

6. Full Adders: provide for carries between bit positions
Basic building block is “full adder”
1-bit-wide adder, produces sum and carry outputs
Truth table:
X Y Cin S Cout

7. Full Adders: provide for carries between bit positions
Basic building block is “full adder”
1-bit-wide adder, produces sum and carry outputs
Truth table:
X Y Cin S Cout
S is 1 if an odd number of inputs are 1.
COUT is 1 if two or more of the inputs are 1.
Recall: Table 2-3, pp32

8. Full-adder circuit

9. Full-adder circuit

10. Full-adder circuit

11. Ripple adder Speed limited by carry chain
Faster adders eliminate or limit carry chain
2-level AND-OR logic ==> 2n product terms
3 or 4 levels of logic, carry look-ahead

12. 74x283 4-bit adder
Uses carry look-ahead internally

13. 16-bit group-ripple adder

14. Subtraction
Subtraction is the same as addition of the two’s complement.
The two’s complement is the bit-by-bit complement plus 1.
Therefore, X – Y = X + Y’ + 1

15. Full Subtractor = full adder, almost
X,Y are n-bit unsigned binary numbers
Addition : S = X + Y
Subtraction : D = X - Y = X + (-Y) = = X+ (Two’s Complement of Y) = X+ (One’s Complement of Y) = X+ Y’+ 1

16. Full Subtractor = full adder, almost
X,Y are n-bit unsigned binary numbers
Addition : S = X + Y
Subtraction : D = X - Y = X + (-Y) = = X+ (Two’s Complement of Y) = X+ (One’s Complement of Y) = X+ Y’+ 1

17. Using Adder as a Subtractor
Ripple Adder can be used as a Subtractor by inverting Y and setting the initial carry ( CIN ) to 1

18. Using Adder as a Subtractor
Ripple Adder can be used as a Subtractor by inverting Y and setting the initial carry ( CIN ) to 1

19. MSI Arithmetic Logic Units (ALU )
74x181
ALU performs Arithmetic and Logical Functions - A , B : 4 bits inputs - S3,S2,S1,S0 : Function select - M=0 : Arithmetic operations +=Plus , - = Minus M=1 : Logical operations : += OR , . =AND
Example : Inputs Functions S3 S2 S1 S M= M= F= A-1+CIN F=A’ F= A-B-1+CIN F=A XOR B’ F= A+B+CIN F=A XOR B F=(A OR B)+ CIN F=A+B F= A+A+CIN F= F=A+CIN F=A S0 S1 G S2 P S3 M
A=B
CIN F0 A0 F1 B0 F2 A1 F3 B1 A2
COUT B2 A3 B3

20. Chapter Summary
Documentation Standards: - Gate symbols, Signals Active Levels, Bubble to Bubble Logic - Block diagram, Schematic Diagram, Timing Diagram.
Combinational Logic design Structures: 1-Decoders : Binary Decoders, Cascading decoders
2-Encoders : Binary Encoder, Priority Encoder, Cascading Encoders, Encoder applications. 3-Three State Buffers : SSI buffers, MSI Octal Buffer , Octal Three-state Transceiver

21. Chapter Summary
4- Multiplexers : MUX operation, Single/Multiple outputs MUX, Expanding MUXs 5- Demultiplexers : MUX/DMUX operation, Using Decoders as Demultiplexers. 6- XOR and XNOR Gates: Logic Symbols, Equivalent Symbols, Parity Circuits, Parity Circuit application ( memory unit checking ) 7- Comparators : Parallel Comparators, Iterative Comparators, Cascading Comparators 8-Adders : Half Adder, Full Adder, Ripple Adder, Subtractor, Ripple Adder / Subtractor Unit,
9- Arithmetic Logic Units

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