1. Chap. 2 Hierarchical Modeling Concepts

2. 2 Hierarchical Modeling Concepts Design Methodologies 4-bit Ripple Carry Counter Modules Instances Components of a Simulation Example Summary

3. 3 Design Methodology Top-down design methodology  Define the final (top) module  Analyze the components which are composed of top module step by step Bottom-up design methodology  Design the basic components  Assemble basic components to larger design until the top design is completed

4. 4 Top-down Design Methodology

5. 5 Bottom-up Design Methodology

6. 6 Hierarchical Modeling Concepts Design Methodologies 4-bit Ripple Carry Counter Modules Instances Components of a Simulation Example Summary

7. 7 4-bit Ripple Carry Counter

8. 8 Hierarchy of 4-bit Ripple Carry Counter Top-down Bottom-up

9. 9 Basic Component: T Flip-Flop

10. 10 Hierarchical Modeling Concepts Design Methodologies 4-bit Ripple Carry Counter Modules Instances Components of a Simulation Example Summary

11. 11 Modules Basic component in Verilog for describing/defining a hardware module ( ); … … endmodule

12. 12 A module for T F.F. module T_FF (q, clock, reset); … … endmodule

13. 13 Levels of functionality Behavioral (algorithmic) level Dataflow level Gate level Switch level

14. 14 Hierarchical Modeling Concepts Design Methodologies 4-bit Ripple Carry Counter Modules Instances Components of a Simulation Example Summary

15. 15 Instances Individual object of module  Module is similar to “function declaration” in C, and instance likes the concept of “function call” Instantiation  A procedure of constructing an instance using module

16. 16 Instances and Instantiation - I Instantiation Instances tff0, tff1, tff2, tff3

17. 17 Instances and Instantiation - II

18. 18 Illegal Module Declaration (Nested module)

19. 19 Hierarchical Modeling Concepts Design Methodologies 4-bit Ripple Carry Counter Modules Instances Components of a Simulation Example Summary

20. 20 Components of a Simulation Design Under Test (DUT) － Design Block Test bench － Stimulus Block  Stimulus generation  Output checking

21. 21 Instantiate a design under test (dut). Stimulus Block - I

22. 22 Additional top module instantiating stimulus and design block. Stimulus Block - II

23. 23 Hierarchical Modeling Concepts Design Methodologies 4-bit Ripple Carry Counter Modules Instances Components of a Simulation Example Summary

24. 24 A Complete Example of 4-bit Ripple Carry Counter

25. 25 T Flip-Flop

26. 26 D Flip-Flop

27. 27 Stimulus and Output Waves

28. 28 Stimulus Block (Testbench)

29. 29 Simulation results

30. 30 Hierarchical Modeling Concepts Design Methodologies 4-bit Ripple Carry Counter Modules Instances Components of a Simulation Example Summary

31. 31 Summary Top-down v.s bottom-up design methodologies Module is basic construction block in Verilog Instance is individual object created by module A simulation consists of two components: Design Block and Stimulus Block