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Digital Integrated Circuits© Prentice Hall 1995 Introduction VLSI DESIGN DOMAIN l Practical application of VLSI Design?
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Digital Integrated Circuits© Prentice Hall 1995 Introduction INTRODUCTION l Systems based on Magnetically controlled switches l Vacuum Tubes »Analog »Digital
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Digital Integrated Circuits© Prentice Hall 1995 Introduction HISTORICAL PERSPECTIVE 1930 - O.Heil and Lilienfeld – FET 1947 – Bardeen, Brattain and Shockley, AT & T Bell Labs, - BJT 1958 – Jack Kilby, Texas Instruments, Hybrid IC Jack Kilby was awarded the year 2000 Nobel prize
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Digital Integrated Circuits© Prentice Hall 1995 Introduction LEVEL OF INTEGRATION Level of Number Typical Integration of Gates Applications SSI 1-10 Basic Gates MSI 10-100 Counters,Decoder, Encoder LSI 100-1000 Memories, ADC/DAC VLSI 1000-10,000 MPU’s ULSI 10,000-100,000 DSP, DEC ALPHA
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Digital Integrated Circuits© Prentice Hall 1995 Introduction Evolution in Complexity
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Digital Integrated Circuits© Prentice Hall 1995 Introduction Evolution in Speed/Performance
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Digital Integrated Circuits© Prentice Hall 1995 Introduction TRANSISTOR FEATURE SIZE
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Digital Integrated Circuits© Prentice Hall 1995 Introduction Silicon in 2010 Die Area:2.5x2.5 cm Voltage:0.6 V Technology:0.07 m
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Digital Integrated Circuits© Prentice Hall 1995 Introduction TERMINOLOGY Manufacturing Lead Time(Turnaround Time) – The time it takes to make an IC excluding the design time. Integrated Circuit – Combination of circuit elements inseparably associated on or within a substrate. Substrate – Supporting material. Monolithic IC – An IC whose elements are formed on or within a substrate. Hybrid IC – Consists of a combination of two or more ICs or an IC with some discrete components.
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Digital Integrated Circuits© Prentice Hall 1995 Introduction TERMINOLOGY Wafer(Slice) – Contains many ICs. Circular in nature. Diameter – 4, 5, or 6 inches. Chip(die or bar) – Repeated ICs on a wafer. Test Plug(Process Control Bar Process Control Monitor) - Special Chip Used to monitor the process parameters of the technology.Used to derive the timing models-Wafer can be discarded.
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Digital Integrated Circuits© Prentice Hall 1995 Introduction
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Digital Integrated Circuits© Prentice Hall 1995 Introduction
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Digital Integrated Circuits© Prentice Hall 1995 Introduction
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Digital Integrated Circuits© Prentice Hall 1995 Introduction
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Digital Integrated Circuits© Prentice Hall 1995 Introduction
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Digital Integrated Circuits© Prentice Hall 1995 Introduction
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Digital Integrated Circuits© Prentice Hall 1995 Introduction
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Digital Integrated Circuits© Prentice Hall 1995 Introduction Defect Density - Lethal defects per cm 2 Yield - Yield = No. of Good Chips on a Wafer/Total Number of Chips Utilization Factor - Utilization Factor = Used Chip Area/Total Chip Area SOC- System On Chip TERMINOLOGY
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Digital Integrated Circuits© Prentice Hall 1995 Introduction PERIODIC SYSTEM
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Digital Integrated Circuits© Prentice Hall 1995 Introduction SEMICONDUCTOR PHYSICS l Intrinsic Si l Ideal crystal structure l Valance 4 l Almost no free carriers l Almost no conduction
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Digital Integrated Circuits© Prentice Hall 1995 Introduction SEMICONDUCTOR PHYSICS l Doping with valance 5 atoms (Phosphor, Arsenic) introduces “Loose electrons” l Electron donor l Conductivity depends on doping level
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Digital Integrated Circuits© Prentice Hall 1995 Introduction SEMICONDUCTOR PHYSICS l Doping with valance 3 atoms (Boron) introduces “Loose Holes” l Electron acceptors l Hole conductivity lower than electron conductivity
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