1. Computer Data Acquisition and Signal Conversion Chuck Kammin ABE 425 March 27, 2006

2. Overview High Level DAQ System Description Quick Review of Digital Fundamentals Digital to Analog Conversion Analog to Digital Conversion

3. High Level System Description A data acquisition (DAQ) system is a collection of add- on hardware and software components that allow your computer to receive real- world information from sensors. It consists of  Sensors  I/O terminal panel(s)  DAQ board(s)  Software

4. Digital Fundamentals Binary Number System Bits and Bytes Binary / Decimal Conversion 2’s compliment Logic Gates NOT, AND, NAND…. Digital Devices Decoder, Encoder

5. Bits and Bytes 8 Bits = 1 Byte For n bits, highest decimal number = 2 n - 1

6. Decimal to Binary Conversion Whole Numbers: Repeated Division by 2 Convert 12 10 to binary: 12/2 = 6 R0 LSB = 0 6/2 = 3R0 = 0 3/2 = 1 R1 = 1 1/2 = 0 R1 MSB = 1 12 10 = 1100 2

7. Decimal to Binary Conversion Fractions: Repeated Multiplication by 2 Convert 0.3125 10 to binary: 0.3125 X 2 = 0.625 MSB = 0 0.625 X 2 = 1.25 =1 0.25 X 2 = 0.5 = 0 0.5 X 2= 1.0 LSB = 1 0.3125 10 = 0.0101 2

8. Binary to Decimal Conversion Sum of Weights Binary: 2 n 2 n -1 ……. 2 2 2 1 2 0. 2 -1 2 -2 ……….. Convert 1100.0101 2 to Decimal: (1 X 2 3) + (1 X 2 2 ) + (0 X 2 1 ) + (0 X 2 0 ) + (0 X 2 -1 ) + (1 X 2 -2 ) + (0 X 2 -3 ) + (1 X 2 -4 ) = 1100.0101 2 = 12.3125 10

9. 2’s Compliment Flip 0’s to 1 and 1’s to 0 and add 1. Example: 2’s compliment of 00001001 is 11110110 + 1 = 11110111 Binary subtraction can be performed via addition using the 2’s compliment. Example: 8 – 3 = 8 + (-3) = 5 00001000 + 11111101 (2’s compliment of -3) 1 00000101 carry over eliminated

10. NOT Gate (Inverter) Truth Table Input AOutput Q 01 10 AQ

11. AND Gate Truth Table Input AInput BOutput Q 000 010 100 111 A B Q

12. NAND Gate Truth Table Input AInput BOutput Q 001 011 101 110 A B Q

13. OR Gate Truth Table Input AInput BOutput Q 000 011 101 111 A B Q

14. NOR Gate Truth Table Input AInput BOutput Q 001 010 100 110 A B Q

15. EX-OR Gate Truth Table Input AInput BOutput Q 000 011 101 110 A B Q

16. EX-NOR Gate Truth Table A B Q Input AInput BOutput Q 001 010 100 111

17. Decoder 3-to-8 Line Decoder y 0 = a’b’c’ y 1 = a’b’c y 2 = a’bc’ y 3 = a’bc y 4 = ab’c’ y 5 = ab’c y 6 = abc’ y 7 = abc a b c Truth Table

18. Encoder y0y0 y1y1 y2y2 y3y3 y4y4 y5y5 y6y6 y7y7 8 to 3 Encoder a b c Truth Table

19. Multiplexer 4-to-1 MUX I0I0 I1I1 I2I2 I3I3 AB Z ABI3ABI3 A B’ I 2 A’ B I 1 A’ B’ I 0 Z

20. Digital to Analog Conversion Converter Types Binary Weighted Input R/2R Ladder Performance Characteristics Resolution Accuracy Linearity Monotonicity Settling Time

21. D/A Binary Weighted Input

22. D/A R/2R Ladder Converter

23. D/A Performance Characteristics Resolution - reciprocal to number of discrete steps in D/A output. For n bit output, resolution = 1 / (2 n - 1). Accuracy - comparison of actual output with expected output expressed as a percentage of full scale. Ideal accuracy is at most  0.5 of LSB. For 8 bit converter LSB = 1/2 8 = 1/256 = 0.0039. Accuracy   0.2%

24. D/A Performance Characteristics Linearity - deviation from ideal straight-line output of D/A converter. Special case is offset error which is D/A converter output when input is all zeros. Monotonicity - D/A converter is monotonic if it does not take any reverse steps when it is sequenced over entire range of input bits.

25. D/A Performance Characteristics Settling Time - the time it takes D/A converter to settle within  1/2 LSB of its final value when a change occurs in the input value.

26. Analog to Digital Conversion Converter Types Flash Stair Step Ramp Tracking Single and Dual Slope Successive Approximation

27. A/D Flash Short Conversion Time N-bit output requires 2 N -1 comparators

28. A/D Flash

29. A/D Stair Step Ramp Slower than Flash A/D Converter Worst case counter must sequence through max number of states before conversion made. Conversion time dependant on analog voltage.

30. A/D Stair Step Ramp

31. A/D Tracking Counter tracks analog input voltage. Disadvantage - counter oscillates between up and down state if input voltage constant.

32. A/D Tracking

33. A/D Single Slope

35. A/D Dual Slope Counter Latches Analog Input Ramp generator Comparator Clock Control Logic Binary Output Switch -V ref A1 A2

36. A/D Successive Approximation Most widely used A/D converter Faster than other methods except for flash method Fixed conversion time

37. A/D Successive Approximations

38. PBL 1 Digital to Analog Conversion Determine the resolution expressed as a percentage, for each of the following D/A converters: a) 3-bit b) 10-bit c) 18-bit

39. PBL 1 Answer a) 3-bit converter, 1/(2 3 -1) X 100 = 14.3% b) 10-bit converter, 1/(2 10 -1) X 100 = 0.098% c) 18-bit converter, 1/(2 18 -1) X 100 = 3.8E-4%

40. PBL 2 How many comparators are required for a 4-bit output flash A/D converter?

41. PBL 2 Answer 2 4 -1 = 15 comparators required