1. Overview of MAPS detectors Fergus Wilson Rutherford Appleton Laboratory (with lots of input and slides from Renato Turchetta and the RAL Sensor Design Group) Vertex 2015, Macha Lake, Czech Republic, 15-19 Sep 2014

2. Outline  Outline  Introduction to Monolithic Active Pixel Sensors  Some non-HEP and commercial uses (and why they matter).  On-going and future HEP MAPS projects and detectors.  Overlapping presentations:  PXL at STAR: M. Szelenicak/M. Simko (poster)  ALICE ITS upgrade: F. Reidt  ATLAS pixels: J. Grosse-Knetter  HV-CMOS: D. Muenstermann  Workshop on CMOS Active Pixel Sensors for Particle Tracking (CPIX14), Bonn, 15-19 Sept  3 days, 37 talks  I’ll do it all in 25 minutes… 16-Sep-2014Fergus Wilson, RAL/STFC2

3. CMOS Monolithic Active Pixel Sensors First invented in the 60’s but CCDs much better then. Re-invented at the beginning of 90s: JPL, IMEC, – Standard CMOS technology. – All-in-one detector-connection-readout – Monolithic. – Small size / greater integration. – Low power consumption. – Low noise. – Radiation resistance. – System-level cost. – Increased functionality. – Increased speed. – Increased readout speed (parallel processing). – Region of interest readout. – Etc… 16-Sep-2014Fergus Wilson, RAL/STFC3

4. Charged Particle Detection 16-Sep-2014Fergus Wilson, RAL/STFC4 Deep p-well: enhances charge collection, allows enhanced pixel structures Thin epitaxial layer: shorter collection times, less multiple scattering, less chance of charge capture Guard rings: improve resistance to radiation damage. High-resistivity epitaxial layer: improved signal to noise. High-resistivity epitaxial layer + low voltage bias (HR-CMOS): charge collection by drift, faster, radiation hardness High voltage bias (HV-CMOS): charge collection by drift, faster, radiation hardness

5. Active pixels and In-Pixel electronics 16-Sep-2014Fergus Wilson, RAL/STFC5 Passive Active Correlated Double Sampling (CDS), reduced noise Move as much processing as you can on to the pixel No need to stop at 4T…

6. A 16-Sep-2014Fergus Wilson, RAL/STFC 6 Fabrication and Stitching. C BD Reticle size is just over 2cm x 2cm  ‘stitching’ Reticle is subdivided in blocks A B ACA BDB C D C D 56 mm

7. Beyond Particle Physics MAPS have penetrated other science areas more quickly than particle physics. Commercially attractive (high yields, low cost). Many overlaps with particle physics requirements: – Radiation tolerance - Cost – Small and large pixels - Reliability – High Speed – Quantum efficiency – High dynamic range – Low power But particle physics detectors want them all ! 16-Sep-2014Fergus Wilson, RAL/STFC7

8. 16-Sep-2014Fergus Wilson, RAL/STFC 8 Transmission Electron Microscopy (TEM) Slide taken from D. Contarato, LBNL, 2012

9. 16-Sep-2014Fergus Wilson, RAL/STFC 9 Detection of electrons in CMOS Single electron detection Good event Bad event Energy contained in one pixel

10.  61x63 mm 2 silicon area (4 dies per wafer)  0.35  m CMOS  16 million pixels, 4Kx4K array  14 µm pixels  32 analogue outputs, 10 Mpixs/sec  40 fps  Pixel binning 1X, 2X and 4X  ROI readout  83 e- rms noise  Full well 120ke-  Radiation hardness of >500 million of primary electrons/pixel (>20 Mrad)  20% QE for visible light Achilles: a 16Mpixel sensor for TEM 16-Sep-2014Fergus Wilson, RAL/STFC 10 www.fei.com Novo virus

11. Motivations – Extra-oral dental, mammography, chest imaging, security,… Requirements – High yield (commodity item). – Radiation hard: – Very large sensors: Wafer scale sensor. One sensor per 8”/20cm wafer 3-side buttable – 2 x N tilling Lassena characteristics – 6.7 Mpixels; 30 fps; 50µm pixels; Low noise: 68 e- – Large area: 3-side buttable to cover any length with 28 cm width – Binning x2, x4; Region-of Interest readout – High dynamic range, multiple programmable integration times 16-Sep-2014Fergus Wilson, RAL/STFC 11 Wafer-scale sensor for X-ray medical imaging

12. 16-Sep-2014Fergus Wilson, RAL/STFC 12 Photon Science - Percival Pixelated Energy Resolving CMOS Imager, Versatile and Large

13. Percival soft x-ray imager 16-Sep-2014Fergus Wilson, RAL/STFC 13  Design goals  Back-thinned  4k x 4k pixels  120 fps (digital CDS)  High dynamic range (4 gains per pixel)  2*10 5 photons @ 250 eV  ~120dB or full well >10 Me-  12+1bit ADC  15 bits per pixel (2 gain bits + 13 bits)  Digital I/O (LVDS)  60 Gbit/sec continuous data rate Pixel array 4kx4k @25µm pitch) 28,000 ADCs (7 ADCs per column) Serialiser and LVDS I/O Multi-level row control SPI and bias generator 210x160 25µm pixel prototype under front illumination at DESY

14. Time-Of-Flight Mass Spectroscopy Courtesy of A. Nomerotski et al., Oxford University 16-Sep-2014Fergus Wilson, RAL/STFC 14 Separate chemical species by (mass/charge) ratio and identify where they are in the specimen Requirements: Timing information Spatial Information

15. 16-Sep-2014 )/ Fergus Wilson, RAL/STFC 15 PImMS family PImMS1: 72 x 72 pixels PImMS2: 324 x 324 pixels PImMS camera 70 um x 70 um pixels 25 ns time resolution (12.5ns has been demonstrated). Continuous 40 Mfps for 100µs. 4 events can be stored in each pixel. 12-bit time-code resolution. Each pixel can be trimmed. Analogue readout of intensity information. Equivalent pixel rate for a standard full frame camera 2 x 10 12 pixels/sec Looks a bit like Linear Collider specs…

16. Ultra-high speed uCMOS - Kirana High resolution: 924 x 768 30µm pixels Die size 32.5 x 25.5 mm. In-pixel storage and Correlated Double Sampling (CDS). Burst mode: 180 frames at 5 MHz. Continuous mode: 1180 fps. Noise: <10e-; full well: 11,700 e- Commercialised (Specialised Imaging) 16-Sep-2014Fergus Wilson, RAL/STFC16 Looks a bit like Linear Collider specs…

17. 16-Sep-2014Fergus Wilson, RAL/STFC 17 Performance summary ParameterUnitValue Pixel pitch (X)um30 Pixel pitch (Y)um30 Pixel format (X) 924 Pixel format (Y) 768 Number of pixels 709,632 Frame rate (burst mode)fps5,000,000 Frame rate (continuous mode)fps1,180 Pixel rate (burst mode)Pixel/sec1.42 T Pixel rate (continuous mode)Pixel/sec0.84 G Noisee- rms<10 e- rms Full well capacitye-11,700 Camera gainµV/e-80 Dynamic range >1,170 dB61.4 bit10.2 Fill Factor 11% Quantum efficiency Without microlens 2.3% (red) 2.2% (blue)

18. MAPS HEP progression Where is MAPS being proposed? 16-Sep-2014Fergus Wilson, RAL/STFC18 0.16 m 2 1.9 m 2 10 m 2 ~100? m 2 STAR PXL (now) mu3e (2015) ALICE ITS (2018) ATLAS Tracker Phase II? (2023) Linear Collider (20??) Vertexer ? Tracker ? Digital Calorimetry ?

19. STAR PXL at RHIC 16-Sep-2014Fergus Wilson, RAL/STFC19 Design: LBNL, UT at Austin; PICSEL group, IPHC, Strasbourg See M Szelezniak talk and M Simko poster. DCA Pointing resolution (12*  24 GeV/p  c)  m LayersLayer 1 at 2.8 cm radius Layer 2 at 8 cm radius Pixel size 20.7  m X 20.7  m Hit resolution 3.7  m* (6  m geometric) Position stability 6  m rms (20  m envelope) Radiation length first layerX/X 0 = 0.39% (Al conductor cable) Number of pixels356 M Integration time (affects pileup) 185.6  s Radiation environment20 to 90 kRad / year 2*10 11 to 10 12 1MeV n eq/cm 2 Rapid detector replacement~ 1 day PRELIMINARY

20. μ3e at PSI 16-Sep-2014Fergus Wilson, RAL/STFC20 µ →eee lepton flavour violation 10 9 muon decays/s. Low P t tracks, resolution dominated by multiple scattering. 4 layers 80x80  m 2 pixel size, 275 MP Thin <50µm. 180nm HV-CMOS. Fast charge collection by drift. Power consumption 7.5 µW/pixel MuPix design: Heidelberg, PSI, Zürich, Genf 3mm

21. μ3e at PSI: recent DESY test-beam results 16-Sep-2014Fergus Wilson, RAL/STFC21 Recent DESY test beam results (MuPix4): Timing resolution 18ns Track residuals: 28µm Hit efficiency > 99%

22. ALICE Inner Tracker System Upgrade 16-Sep-2014Fergus Wilson, RAL/STFC22 See Felix Reidt talk Many competing/collaborating architectures: MISTRAL/ASTRAL (IPHC), Cherwell (RAL), ALPIDE (CCNU/CERN/INFN/Yonsei) Also being considered for forward tracker

23. ATLAS Phase II Tracker Challenges – 200 bunches in pile-up, increased particle densities. (1-2 GHz/cm 2 ) – Increased radiation damage (2 x 10 16 n eq /cm 2 ) – Increased power requirements. – Reduced material required. Pixel+microstrip still the baseline but have ~2-3 years to show that CMOS could be viable technology. – Strips -> elongated pixels. – MAPS with HV-CMOS or HR-CMOS for radiation hardness and speed. – MAPS not the only candidate: thin planar silicon, diamond, 3-D detectors… 16-Sep-2014Fergus Wilson, RAL/STFC23 See Daniel Muenstermann talk A hybrid MAPS ?

24. Vertexing and Tracking for Linear Collider Pixels are a baseline technology for CLIC/LC vertexing; could become baseline technology for tracking. CLIC detector development has been progressing; LC development has been on hold for ~6 years. But CLIC and ILC have very different bunch structures. – ILC: 5Hz, 2625 bunches in 1ms followed by 199ms gap. – CLIC: 50Hz, 312 bunches, 0.5ns between bunches, 20ms gap. MAPS (Mimosa, Chronopixels, LBL, INFN...), clixpix, CCD, ISIS, DEPFET, SoI, 3D,… 16-Sep-2014Fergus Wilson, RAL/STFC24 See S.Redford CLIC, A.Besson ILC Example of MAPS performance Cherwell sensor. 99.7% hit efficiency. 3.7μm hit resolution. Power pulsing.

25. Digital Calorimetry for Linear Collider 16-Sep-2014Fergus Wilson, RAL/STFC25 An alternative to silicon wafers or scintillators. Results from TPAC chip in CERN test beam. Shows correct behaviour as function of energy. Demonstrates DECAL/MAPS concept validity TPAC sensor: 168 x 168 pixels 50x50μm Digital readout Sample every 400ns T.Price, Birmingham, 2013

26. MAPS are already commercially available. MAPS have already penetrated non-HEP areas – Medical, photon science, space, X-rays, neutron, lasers,… In HEP – Capabilities proven at STAR. – Soon to be used in μ3e vertex detector. – Expect to see used in a tracker in ALICE ITS, Forward Tracker. – Already seeing radiation hardness and speeds (not to mention power consumption, material thickness, cost, …) that are suitable for LHC phase II upgrades – MAPS an excellent candidate for LC/ILC vertex detectors and trackers. 16-Sep-2014Fergus Wilson, RAL/STFC 26 Conclusions.

27. Backup 16-Sep-2014Fergus Wilson, RAL/STFC27

28. 16-Sep-2014Fergus Wilson, RAL/STFC 28 Kirana pixel. 1 Photodiode Memory bank -A vertical entry (VEN) bank with 10 cells -Ten rows of lateral (LAT) banks, each with 16 cells -A vertical exit (VEX) bank with 10 cells -Total of 180 memory cells

29. 16-Sep-2014Fergus Wilson, RAL/STFC 29 Kirana pixel. 2 Highly scalable architecture: -Number of memory cells -Number of pixels

30. 16-Sep-2014Fergus Wilson, RAL/STFC 30 Burst mode Vertical transfers x10 @ full speed

31. 16-Sep-2014Fergus Wilson, RAL/STFC 31 Burst mode Charge moved into lateral memory bank

32. 16-Sep-2014Fergus Wilson, RAL/STFC 32 Burst mode Ten more vertical transfers

33. 16-Sep-2014Fergus Wilson, RAL/STFC 33 Burst mode Lateral transfer x1 @ full speed / 10

34. 16-Sep-2014Fergus Wilson, RAL/STFC 34 Burst mode … and so on, seamless

35. 16-Sep-2014Fergus Wilson, RAL/STFC 35 Burst mode … and so on, seamless

36. 16-Sep-2014Fergus Wilson, RAL/STFC 36 Burst mode … and so on, seamless

37. 16-Sep-2014Fergus Wilson, RAL/STFC 37 Burst mode … and so on, seamless

38. 16-Sep-2014Fergus Wilson, RAL/STFC 38 Burst mode … and so on, seamless

39. 16-Sep-2014Fergus Wilson, RAL/STFC 39 Burst mode … and so on, seamless

40. 16-Sep-2014Fergus Wilson, RAL/STFC 40 Burst mode … and so on, seamless

41. 16-Sep-2014Fergus Wilson, RAL/STFC 41 Burst mode

42. 16-Sep-2014Fergus Wilson, RAL/STFC 42 Burst mode Charge in the vertical exit registers is dumped in the reset node … … until receipt of the trigger. The status of the memory bank is then frozen and the sensor read out.

43. 16-Sep-2014Fergus Wilson, RAL/STFC 43 Continuous mode Memory bank acting simply like a delay line

44. 16-Sep-2014Fergus Wilson, RAL/STFC 44 Continuous mode Memory bank acting simply like a delay line

45. 16-Sep-2014Fergus Wilson, RAL/STFC 45 Continuous mode Memory bank acting simply like a delay line

46. 16-Sep-2014Fergus Wilson, RAL/STFC 46 Continuous mode Memory bank acting simply like a delay line

47. 16-Sep-2014Fergus Wilson, RAL/STFC 47 Continuous mode Memory bank acting simply like a delay line

48. 16-Sep-2014Fergus Wilson, RAL/STFC 48 Continuous mode Memory bank acting simply like a delay line

49. 16-Sep-2014Fergus Wilson, RAL/STFC 49 Continuous mode Memory bank acting simply like a delay line

50. 16-Sep-2014Fergus Wilson, RAL/STFC 50 Continuous mode Memory bank acting simply like a delay line

51. 16-Sep-2014Fergus Wilson, RAL/STFC 51 Continuous mode

52. 16-Sep-2014Fergus Wilson, RAL/STFC 52 Continuous mode

53. 16-Sep-2014Fergus Wilson, RAL/STFC 53 Continuous mode

54. 16-Sep-2014Fergus Wilson, RAL/STFC 54 Continuous mode

55. 16-Sep-2014Fergus Wilson, RAL/STFC 55 Continuous mode

56. 16-Sep-2014Fergus Wilson, RAL/STFC 56 Continuous mode

57. 16-Sep-2014Fergus Wilson, RAL/STFC 57 Continuous mode