1. Introduction to Flexible Electronics I Michael Thompson – MS&E Cornell University LIFE ERC Discussions February 24, 2007

2. Applications for Flexible Electronics Memory Integrated Electronics Integrated Electronics Optical Network Optical Network Smart Card Smart Card HDI Display Imaging Solid State Lighting Solid State Lighting

3. Large area manufacturing – pioneered by glass AMLCD Gen 8 Gen 7 Gen 6 Gen 5 Gen 3-4 100 MM ft 2 shipped in 2002

4. Key elements in the thin film TFT Al Barrier SiO 2 Substrate (Plastic or otherwise) Passivation or barrier SiO 2 layer –Structural and electrical limiter –Thermal expansion mismatch –Limits high-T processes even on high-T compatible substrates Channel and Source/Drain semiconductor –High performance by laser crystallization Gate dielectric –Coupled with channel properties determines transconductance Source/drain (doped) Gate dielectric Gate metal (self-aligned?)

5. Meanings of flexible electronics Flexible is a poor moniker for a broad set of properties Bendable –Actively deformed during end-use Range from small infrequent deformation (cell phone) Continuous large scale deformation (fabric-based electronics) –Shape tolerant Deformed to match application (windshield) Rollable format (volume sensors) Conformal electronics –Fabricated on/to non-standard shapes (spherical detectors) Stretchable electronics –Large scale reversible deformation (bandages) Large area electronics –Sparse active components (sensor area enhancement) –Dense active components (displays) Low cost electronics –Disposable / single use –Large volume, low value (RFID)

6. Substrates for Flexible Electronics Substrate Choices AdvantagesDensity potentialChallenges GlassHigh temperature Good chemical stability m 2 current, RTR possible Micron-scale lithography possible – integration at the level of early 1990’s Flexibility limited, lamination likely required PET / PENTransparent Optically compatible Extremely flexible Biocompatibility Ranges from few microns to 100’s microns depending on semiconductor and processes Low temperature (<200 o C) Distortion during processing Poor barrier properties Polyimide (Kapton) Higher process temperatures Chemically resistant Biocompatibility Ranges from few microns to 100’s microns depending on semiconductor and processes Optically absorbing Thermal mismatch Process induced distortion Stainless Steel foils High temperature Good barrier properties Few micron scaleSurface roughness Thermal expansion mismatch PDMSExtremely flexible and stretchable 100’s micron?Low temperature compatibility with organics only

7. Flexible glass substrates Durable for military applications Effective barrier to air and moisture for OLEDs Corning has patented hermetic sealing method Low-cost manufacturing process Researching polymer coatings

8. Key challenge: Static Semiconductor Processing Temperatures

9. Technology Goals for poly-Si TFTs Low temperature process –Compatibility with transparent polymeric substrates for display applications –Maximum static process temperatures of ~150 o C High performance devices –Amorphous Si and organic TFT’s have inadequate current (mobility <10 cm 2 /V-s) –Poly-Si or near single crystal (200 cm 2 /V-s) required Critical front-end processing (FEP) challenges –Crystallization of poly-Si –Dopant activation –Low temperature gate dielectric Critical back-end processing (BEP) challenges –Contact sintering –Hydrogenation –Pixel module integration Max Process Temp Material Primary Challenges 900°C 900°CSteel Opaque, poor surface finish 275°C 275°CPolyimide (Kapton) Orange color, high moisture absorption 250°C 250°C Polyetheretherketo ne (PEEK) Amber color 230°C 230°C Polyethersulphone (PES) Moisture absorption 200°C 200°C Polyetherimide (PEI) Brittle, hazy/colored, 150°C 150°C Polyethylenenapth alate (PEN) Temperature, moisture absorption 120°C 120°CPolyester (PET) Temperature, moisture absorption

10. Materials for active electronics SemiconductorProcess temperature PerformanceIssues and advantages Single crystal Si1300 o C600 cm 2 /V-sMetric by which all others measured Furnace poly-Si650 o C50 cm 2 /V-s Laser crystallized poly- Si 100 – 400 o C50-400 cm 2 /V-sCost Microcrystalline Si100-400 o C10-200 cm 2 /V-sDeveloping materials Oxide semiconductors (ZnO 2 ) ?10-100 cm 2 /V-sIntrinsically stable Amorphous Si100 o C1 cm 2 /V-sDominant flexible choice Pentacene<100 o C0.01-3 cm 2 /V-sNot solution processible Solution-processible organic <100 o C10 -6 – 10 -2 cm 2 /V-sLow cost, printable

11. Alternative TFT Technologies Low / moderate performance on plastic –Amorphous Si TFTs Uniformity Developed Technology –Polymer / Small molecule organic TFTs Potential low-cost processing / printed technology Substrate selection –Stainless steel foils –Ultra-thin glass Transfer technologies –SUFTLA thin-film transfer –Wafer scale exfoliation –Thin-film single-crystal platelets Other crystal techniques –Microcrystalline deposition (performance?)

12. Application driven requirements: Mobility Electron/hole mobility: transit speed across device Gate capacitance (dielectric thickness): carrier density in channel Ultimate technology speed depends on mobility, gate capacitance, and uniformity (to utilize both) TechnologyApplication Mobility (cm 2 /V-s) Low T comp? Silicon CMOSMicroprocessors (pentium), microdisplays650 +No Continuous Grain Silicon (CGS) High resolution small displays (digital cameras) 300 – 500?No Near single-crystal poly-Si (e.g. SLS) Driver electronics. TFT electronics (processors, memory) 400 - 600Yes Poly-silicon (laser annealed) Medium and high performance displays (laptops, digital cameras, OLED) 40 - 400Yes Poly-silicon (furnace annealed) LCD prototypes10 - 100No Amorphous siliconMainstream TFT-LCD (laptops, PDA’s)0.5 - 1.0Yes OrganicsResearch0.1 - 5Yes

13. Processing methodologies Wafer to waferTraditional Si based technology. Wafers up to 300 mm diameter. High cost / high performance. $6/cm 2 fully processed Plate to plateModel for AMLCD flat panels. Larger area at lower performance. Currently over 1m 2 per plate. $1/cm 2 processed costs Roll-to-roll lithography Conventional processing transferred to “printing” press style manufacturing. Ink-jet printingEliminate costly patterning steps, direct deposition of materials in desired structures. Potential for ultimate low cost Offset / other printing Large area simultaneous printing – ultimately lowest cost in $0.01/cm 2

14. Roll-to-Roll Manufacturing Silicon Metal Lamp Photomask Supply Roll Take-Up Roll Supply Roll Take-Up Roll Etch Bath Transfer Rolls Transfer Rolls Thin Film Deposition & Laser Processing Photolithography Wet Chemical Etching & Cleaning SiO 2 Cooling Drum Laser Take-Up Roll Supply Roll

15. Roll-to-roll Manufacturability Studies Initial development on deposition and laser processing Ongoing discussions with lithography tool manufacturers Characterization of defect generation in roll-to-roll web handling

16. Pilot Production Cost savings Early applications Cap Ex est.: 1 : 4 ratio Mfg Cost est.: 1 : 3 ratio Plate to Plate Roll to Roll Manufacturing Strategy Time line

17. Active Matrix: Two displays per wafer, fabricated at Cornell CNF OLED Display as finished at Kodak D. Ast Pixel Layout Kodak/Cornell OLED AM display

18. Flex Stainless Steel (E-Ink) 1.6” diagonal 80 ppi (100x80) 0.30mm thickness

20. GaN particles for illumination or TFT applications Ability to fabricate high purity GaN particles –From ~10  m size into 30 nm size Particles can be spun coated (as shown) Rare earth doping  all colors (red shown) Process temperatures for device fabrication are compatible with flexible substrates (Spencer)

21. Ink Jet Patterning Low cost, versatile method for large area printing Needs new inks, new processes, new device designs Ideal research area to complement CAMM Cornell expertise in ink design, nanoparticle processing (Ober, Wiesner, Thompson)

22. 150 o C TFT on Plastic Process Steps 1.deposit compliance layer and thermal isolation oxide 2.deposit a-Si 3.crystallize a-Si (excimer laser) 4. deposit gate oxide 5. deposit gate electrode 6. pattern gate (mask # 1) 7.dope source/drain Implant + laser anneal In-situ doping + laser anneal 8.pattern Si device regions (mask # 2) 9. deposit contact isolation oxide 10. pattern & etch contacts (mask # 3) 11.deposit and pattern metal (mask # 4) 12.Low-T ITO deposition and patterning doped polysilicon Plastic Substrate Compliance & Thermal Barrier Metal or poly-Si poly-Si Gate SiO 2 5 4 2,3 1 doped polysilicon Plastic Substrate Barriers M Sin+ Si 6 7,8 doped polysilicon Plastic Substrate Barriers SiO 2 Al M Si Al SiO 2 11 9,10 n+ Si ITO 12

23. Gate Voltage log Drain-Source Current Sub-threshold Slope (volts/decade) Gate Voltage Drain-Source Current (to OLED) Mobility Threshold Voltage TFT Performance Metrics Mobility: high current capability (OLED display brightness and fast driver circuits) Threshold voltage control Sub-threshold slope (steep on- off transition) Device uniformity doped polysilicon Plastic Substrate SiO 2 Al G Si Al SiO 2 GATE DRAINSOURCE

24. 0.0 20.0 40.0 60.0 80.0 100.0 120.0 140.0 160.0 05 101520 V DS (Volts) I DS ( µ A) V G = 20.0V V G = 17.5V V G = 15.0V V G = 12.5V Typical TFT on Plastic Performance 100ºC maximum process temperature 10 -11 10 -10 10 -9 10 -8 10 -7 10 -6 10 -5 10 -4 10 -3 -10010203040 I DS (Amps) V GS (Volts) V DS = 1.0V V DS = 10.0V W/L = 100/50 µ m µ n = 44 cm 2 /V-sec S = 1.7 V/decade

25. “High-performance” TFT results NMOS TFT performance: –Mobility > 250 cm2/V-s –Threshold voltage ~ 5 V –Sub-threshold swing: ~ 0.5 V / decade PMOS TFT performance: –Mobility ~ 125 cm2/V-s –Threshold ~ -5.5 V –Sub-threshold swing ~ 1.2 V / decade W/L = 20/10

26. Active Matrix TFT with integrated OLED TFT provides correct current level (~10  A) to OLED for desired intensity. SiO 2 Al SiO 2 Plastic Substrate Barrier SiO 2 Cathode SiO 2 ITO OLED Light! Passivation Layer SiO 2 Plastic Substrate Current Flow

27. Summary Key requirements for flexible driven –Large area sparse –Moderate density but absolute flexibility –Conformable requirements –Bio/environmental compatibility precludes Si Can’t be done with existing Si electronics –Particularly packaging