1. May 2012Dynamic Programming1 Dynamic Programming and Some VLSI CAD Applications Shmuel Wimer Bar Ilan Univ. Eng. Faculty Technion, EE Faculty

2. May 2012Dynamic Programming2 Outline NP Completeness paradox Efficient matrix multiplication by dynamic programming Dynamic programming in a tree model –Optimal tree covering in technology mapping –Optimal floor planning –Optimal buffer insertion Dynamic programming as sequential decision problem –Resource allocation –The knapsack problem –Automatic cell layout generation –Optimal wire sizing

3. May 2012Dynamic Programming3 NP Completeness Paradox

4. May 2012Dynamic Programming4 j i 012345678910111213 1 2 3 4 5 TTFFFFFFFFFFFF TTFFFFFFFTTFFF TTFFFTTFFTTFFF TTFTTTTFTTTFTT TTFTTTTFTTTTTT

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7. May 2012Dynamic Programming7 Optimal Matrix-Chain Multiplication

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17. May 2012Dynamic Programming17 Elements of Dynamic Programming A problem exhibits optimal substructure if an optimal solution to the problem contains within it optimal solutions to sub problems. In a sequence of decisions the remaining ones must constitute optimal solutions regardless of past decisions. (principle of optimality). The space of sub problems must be small, namely, a recursive solution must solve same problem many times. Optimization problem has overlapping sub- problems.

18. May 2012Dynamic Programming18 Overlapping sub-problems called by recursive solution are memorized (encoded in a table), hence addressing their solution only once. Optimal solution is constructed by backtracking.

19. May 2012Dynamic Programming19 Optimal Tree Covering A problem occurring in mapping logic circuit into new cell library. Given: Rooted binary tree T(V,E) called subject tree (cone of logic circuit), whose leaves are inputs, root is an output and internal nodes are logic gates with their I/O pins. A family of rooted pattern trees (logic cells of library), each associated with a non-negative cost (area, power, delay). Root is cell’s output and leaves are its inputs.

20. May 2012Dynamic Programming20 A cover of the subject tree is a partitioning where every part is matching an element of library and every edge of the subject tree is covered exactly once. Find a cover of subject tree whose total sum of costs is minimal.

21. May 2012Dynamic Programming21 r st u t 1 (2)t 2 (3)t 5 (5) t 4 (4) t 3 (3) t2t2 t1t1 t1t1 t3t3 3+2+2+3=10 t4t4 t1t1 t3t3 4+2+3=9 t2t2 t5t5 3+5=8

22. May 2012Dynamic Programming22 NAND2 (11) AOI21 (3) NAND3 (3) NAND2 (2) INV (1) a b c d g e f j h i INV (3) NAND2 (5) NAND2 (8) INV (9) AOI21(6) NAND2 (5) NAND3 (3) INV (1) NAND2 (2) INV (1) NAND2 (2) NAND3 (12) Observation: pattern p rooted at the root of T(V,E) yields minimal cost only if the cost at any of p’s leaves is minimal, suggesting bottom-up matching algorithm.

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24. May 2012Dynamic Programming24 v u, q Optimal Buffer Insertion ? ? ? ? ? ? ?

25. May 2012Dynamic Programming25 Delay Model R3R3 C1C1 R2R2 R6R6 R5R5 R4R4 R7R7 C6C6 C5C5 C4C4 C7C7 R1R1 C2C2 C3C3 0 1 3 2 4 5 6 7

26. May 2012Dynamic Programming26 Bottom-Up Solution RKRK CKCK K (T’ K, L’ K ) RMRM CMCM M sub-tree (T M, L M ) RNRN CNCN N sub-tree (T N, L N ) (T K, L K )

27. May 2012Dynamic Programming27 Outline of Algorithm L’ K T’ K LMLM TMTM LNLN TNTN + = Merging sub-tree solutions at a parent node takes linear time! With b nodes, 2 b buffer insertions exist. There’s a polynomial solution!

28. May 2012Dynamic Programming28 Interconnect Signal Model line-to-line coupling driver’s resistance receiver’s load line resistance signal's activity, 0<= AF <=1 Using Elmore delay model, simple, inaccurate but with high fidelity

29. May 2012Dynamic Programming29 Interconnect Bus Model σ1σ1 A σiσi σnσn σ n-1 WiWi SiSi S i+1 RiRi CiCi L

30. May 2012Dynamic Programming30 Delay and Dynamic Power Minimization signal’s delay: signal’s dynamic power:

31. May 2012Dynamic Programming31 Minimize bus delay Minimize bus power Subject to: In 32nm node and beyond spaces and widths are very few discrete values Continuous optimization and its well-known results are invalid. The sizing problem is NP-complete. A pseudo polynomial resource allocation dynamic programming solution is suitable.

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34. May 2012Dynamic Programming34 FloorplanGraph representation Floorplan and Layout B2B2 B1B1 B3B3 B5B5 B4B4 B6B6 B 12 B9B9 B8B8 B7B7 B 10 B 11 B2B2 B1B1 B 10 B5B5 B 12 B6B6 B3B3 B9B9 B8B8 B7B7 B 11 B4B4 Vertices - vertical lines. Arcs - rectangular areas where blocks are embedded. Floorplan is represented by a planar graph. A dual graph is implied.

35. May 2012Dynamic Programming35 Actual layout is obtained by embedding real blocks into floorplan cells. –Blocks’ adjacency relations are maintained –Blocks are not perfectly matched, thus white area (waste) results Layout width and height are obtained by assigning blocks’ dimensions to corresponding arcs. –Width and height are derived from longest paths Different block sizes yield different layout area, even if block sizes are area invariant. From Floorplan to Layout

36. May 2012Dynamic Programming36 Optimal Slicing Floorplan hh v v v v B2B2 B1B1 B3B3 B5B5 B4B4 B6B6 B 11 B3B3 B4B4 B5B5 B6B6 B8B8 B9B9 B 10 B1B1 B2B2 B7B7 h hh h B 12 B9B9 B8B8 B7B7 B 10 B 11 Slicing tree. Leaf blocks are associated with areas. v Top block’s area is divided by vertical and horizontal cut-lines

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38. May 2012Dynamic Programming38 += += + = Merge horizontally two width-height sets (vertical cut-line) v

39. May 2012Dynamic Programming39 h Size of new width-height list equals sum of lengths of children lists, rather than their product.

40. May 2012Dynamic Programming40 Sketch of Proof Problem is solved by a bottom-up dynamic programming algorithm working on corresponding slicing tree. Each node maintains a set of width-height pairs, none of which can be ruled out until root of tree is reached. Size of sets is in the order of node’s leaf count. Sets in leaves are just B i ’s two orientations. The sets of width-height pairs at each node is created by merging the sets of left-son and right-son sub-trees in time linear in their size. Width-height pair sets are maintained as a sorted list in one dimension (hence sorted inversely in the other dimension). Final implementation is obtained by backtracking from the root.

41. May 2012Dynamic Programming41 Automatic Cell Layout Generation Transistor placement comprises: 1.Transistor P-N pairing 2.Pair ordering 3.Pair flipping – optimize cell area, node cap, potential cell abutment, cell’s internal routing 3 step process: 1.Transistor placement 2.Interconnect completion 3.Design rule adherence aa Vcc bb Vss b a Vcc Vss Vcc Vss Cost=0 a b a b Vcc Vss Cost=1 a Vcc b a b Vss Cost=2

42. May 2012Dynamic Programming42 Most cells unfortunately contain more than 4 transistors. A flip configuration of a pair depends on the flip of its left and right neighbors. Seek the flip configuration yielding minimal sum of abutment cost. –With n pairs, there are 2 n solutions to consider. Observation: An optimal flip of j+1 pairs subject to given right end configuration of pair j necessitates that the first j pairs have been optimally flipped. – Principle of optimality, optimal sub problem solutions. Observation: The optimal flip of rest n – j pairs is independent of the first j flips except the right end configuration of pair j. –This defines a state for which only the lowest cost flip of j pairs is of interest. Dynamic Programming solution is in order. (Bar-Yehuda et. al.)

43. May 2012Dynamic Programming43 abutment cost State Augmentation a b c d c b a d c d a b a d c b a b c d c b a d c d a b a d c b stage j stage j+1

44. May 2012Dynamic Programming44 Dynamic programming takes O(n) time. Can be extended to multi-row cell (double height, etc.). It can be combined in a DFS algorithm which considers simultaneously paring, pair ordering and optimal flip, without any complexity overhead (state augmentation takes O(1) time) Dynamic programming is solving in fact a shortest path algorithm on the state transition graph. New litho rules in 32nm and smaller feature size offer many optimization opportunities.

45. May 2012Dynamic Programming45 Resource Allocation

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47. May 2012Dynamic Programming47 Sequential decision making process. Transition occurs from state to state. A state is a summary of prior history of the process sufficiently detailed to enable evolution of current alternatives. –Sequential decision process evolves from state to state. –The pair (j,y) is a state in the resource allocation process. –The elements encoded in a state are called state variables. Principle of optimality states that whatever the initial state is and decisions were, the remaining decisions must constitute an optimal policy. Elements of Dynamic Programming

48. May 2012Dynamic Programming48 Linear Case: Knapsack Problem

49. May 2012Dynamic Programming49 Linear Case: Knapsack Problem