1. ECE 301 – Digital Electronics Flip-Flops and Registers (Lecture #15)

2. ECE 301 - Digital Electronics2 Basic Memory Elements

3. ECE 301 - Digital Electronics3 Basic Memory Elements Basic Latch  A feedback connection of two NOR gates or two NAND gates, which can store one bit of information. Can be set to 1 or reset to 0. Gated Latch  A basic latch that also includes input gating and a control input signal (i.e. the clock). Flip-Flop  A storage element based on the gated latch principle, which can have its output state changed only on the edge of the controlling clock signal.

4. ECE 301 - Digital Electronics4 D Flip-Flop

5. ECE 301 - Digital Electronics5 Master-Slave Flip-Flop D Flip-Flop

6. ECE 301 - Digital Electronics6 D Flip-Flop: Master-Slave

7. ECE 301 - Digital Electronics7 D Flip-Flop: Master-Slave D Clock Master active Slave active Y Q

8. ECE 301 - Digital Electronics8 Positive Edge-triggered Flip-Flop D Flip-Flop

9. ECE 301 - Digital Electronics9 D Flip-Flop: Edge-Triggered positive edge negative edge

10. ECE 301 - Digital Electronics10 D Flip-Flop: Symbols

11. ECE 301 - Digital Electronics11 D Flip-Flop: Function Table

12. ECE 301 - Digital Electronics12 Comparison of Level-Sensitive and Edge-Triggered Memory Elements Basic Memory Elements

13. ECE 301 - Digital Electronics13 D Clock Q a Q b D Q Q (b) Timing diagram D Q Q D Q Q D Clock Q a Q b Q c Q c Q b Q a (a) Circuit Clk Q c Gated D Latch Positive Edge-triggered D Flip-Flop Negative Edge-triggered D Flip-Flop + Edge-triggered D FF Gated D Latch - Edge-triggered D FF Note that the Latch, Positive Edge-triggered FF, and Negative Edge-triggered FF each have a unique symbol

14. ECE 301 - Digital Electronics14 Asynchronous Preset and Clear Signals Flip-Flops

15. ECE 301 - Digital Electronics15 Q Q D Clock (a) Circuit D Q Q Preset Clear (b) Graphical symbol Clear Preset master slave Asynchronous Preset and Clear

16. ECE 301 - Digital Electronics16 JK Flip-Flop Flip-Flops

17. ECE 301 - Digital Electronics17 JK Flip-Flop

18. ECE 301 - Digital Electronics18 JK Flip-Flop

19. ECE 301 - Digital Electronics19 T Flip-Flop Flip-Flops

20. ECE 301 - Digital Electronics20 T Flip-Flop

21. ECE 301 - Digital Electronics21 T Flip-Flop

22. ECE 301 - Digital Electronics22 Registers

23. ECE 301 - Digital Electronics23 Registers Register  Consists of N Flip-Flops  Stores N bits  Common clock used for all Flip-Flops Shift Register  A register that provides the ability to shift its contents (either left or right).  Must use Flip-Flops Either edge-triggered or master-slave  Cannot use Level-sensitive Gated Latches

24. ECE 301 - Digital Electronics24 4-bit Register Registers

25. ECE 301 - Digital Electronics25

26. ECE 301 - Digital Electronics26 4-bit Register with Parallel Load Registers

27. ECE 301 - Digital Electronics27 2-to-1 Multiplexer

28. ECE 301 - Digital Electronics28 4-bit Serial-In Serial-Out Shift Register Registers

29. ECE 301 - Digital Electronics29 4-bit SI/SO Shift Register common clock Edge-triggered Flip-Flop

30. ECE 301 - Digital Electronics30 Parallel-In Parallel-Out Shift Register Registers

31. ECE 301 - Digital Electronics31 2-to-1 Multiplexer

32. ECE 301 - Digital Electronics32 Parallel-In Parallel-Out Bi-directional Shift Register Registers

33. ECE 301 - Digital Electronics33 4-bit PI/PO Bi-directional Shift Register

34. ECE 301 - Digital Electronics34 Acknowledgments The slides used in this lecture were taken, with permission, from those provided by Pearson Prentice Hall for Digital Design (4 th Edition). They are the property of and are copyrighted by Pearson Education.