1. Programming & Development of Mobile & Embedded Systems Lin Zhong ELEC424, Fall 2010

2. Outline Programming basics Programming MSP430 Programming Windows Mobile devices 2

3. Programming basics How programmable systems work 3 executables Execution unit Instruction fetching Non-volatile storageProcessing Programming is about changing the content of non-volatile storage PC: Hard drive Mobile Devices: Flash ROM MSP430: Flash ROM Many input channels can work PC: DVD/CD drive M, USB drive, Ethernet, Wi-Fi Mobile Devices: USB port, Bluetooth, Cellular, Wi-Fi MSP430: Any input (even analog!!!!)

4. Programming basics (Contd.) How executables are generated? 4 High-level language C/C++/C#/Java Matlab/Labview Perl Intermediate format Assembly Java byte code Machine code 101010100 Compile Machine code 101010100 Machine code 101010100 Machine code 101010100 Link Compile & link can be done at run-time Java & C#: second stage compilation Perl/BASIC (interpretive languages)

5. Cross platform development Cross compile & Cross link – Produce the machine code for a foreign platform – PC  Mobile devices X86 processors  ARM processors – PC  Orbit sensors X86 processors  MSP430 Cross development tool chains – Linux GNU ARM tool chains – Integrated development environment (IDE) Microsoft Visual Studio IAR Embedded Workbench 5

6. IDE concepts Projects – Organized source files – Properties of target platform Run-time debug – Debug/release modes Emulators – Development without a physical device 6

7. Programming MSP430 7 JTAG USB cable

8. IAR Embedded Workbench C and C++ Software emulator Free evaluation version 8

9. IAR Embedded Workbench Project options 9

10. Run-time debugging 10

11. Getting help 11

12. Memory space Unified address space No “cache” 12

13. Tilt 2 vs. PC 13 CPU Cache Registers Main memory Hard disk File system cache

14. Special function registers (SFRs) 16 registers (R0-R15) Program counter (PC)/R0 – Pointer to the next instruction 14

15. Stack pointer (SP/R1) Store the return addresses of subroutine calls and interrupts Stack – Last-In, First Out – PUSH – POP – Automatic allocated memory in C You don’t need to worry about it – Take care by the compiler – Subroutine calls – Interrupt handlers 15

16. Status register (SR/R2) Can be read and written 16 Clock

17. Load-store architecture 17 MEM/Cache Register file Execution unit Load/store a.k.a. RISC architecture

18. Interrupt-driven programming 18 TimerA() USARTRX() Interrupt handlers System idle Interrupt Start Initialization Clock I/O pins Interrupt Periperals

19. Initialization 19

20. Interrupt properties Maskable vs. non-maskable Nested Priority 20

21. IAR EWR interrupt Enable interrupt 21

22. IAR EWR interrupt Interrupt handler is a special subroutine 22

23. A problem – A[0]=1; – B[0]=1; enable interrupt there while () { – if (A[0]!=B[0]) exit; – else continue ; } 23 Interrupt_handler() { A[0]=2; B[0]=2; }

24. A problem A[0]=1; B[0]=1; while () { – if (A[0]!=B[0]) exit; – else continue ; } 24 Interrupt_handler() { A[0]=2; B[0]=2; } LD R13, (A[0]); LD R14, (B[0]) ; CMP R13, R14; JEQ EXIT

25. Critical section A[0]=1; B[0]=1; while () { – if (A[0]!=B[0]) exit; – else continue ; } 25 Interrupt_handler() { A[0]=2; B[0]=2; } LD R13, (A[0]); LD R14, (B[0]) ; CMP R13, R14; JEQ EXIT; ……. Section of code that access a shared resource that must not be concurrently accessed by more than one thread of execution

26. Atomic operation A set of operations that appears to be one to the system – System state change due to the operations invisible until all the operations are successful – If any of the operations fails, the entire set fails; and no change to the system state Examples – An assembly instruction – Interrupt-disabled 26

27. When do we need an OS? 27