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Published byAnnabel Shelton Modified over 9 years ago
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1 5 Packaging Intro Ken Gilleo PhD ET-Trends LLC 44%
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2 the Package DEVICE JOINING WIRING PROTECTION Standardization Performance Enhancement Thermal Management Easy Testability Automated Handling Easy Assembly Enable repair Reworkability PROTECTION Chip to PCB Compatibility Rerouting Selective Access to Environment Enable Mechanical Movement Low Stress MEMS
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3 Packaging Change Drivers 1.Miniaturization Area Height Weight 2.Performance High lead count High frequency; processors, RF 3.MEMS/MOEMS/Nano; a new technology cluster
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4 Devices TIME PERFORMANCE Solid State MEMS MOEMS Nano ~50 Years Vacuum
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5 Base; platform; chip carrier 1 st Level Interconnect (to chip) Routing (can be optional) 2 nd Level Interconnect (to substrate/PCB) Enclosure; encapsulant Special features TThermal management PPorts, windows, other Basic Package Elements
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6 Packages Element – cont. Substrate/Platform/Enclosure Rigid organic; BT, etc. Flexible organic; polyimide Ceramic/glass Metal with insulation Protection; enclosure, encapsulation, passivation Chip Connections (1st level) Wire bond TAB Integrated TAB DCA; Flip Chip PCB Assembly (2nd level) Fusible: solder spheres/balls/bumps Non-fusible: leads, pins, pads DIE DIELECTRICS CONDUCTORS
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7 Lead Frames Metal – free standing or pre-inserted into dielectric Framing structure removed later Ceramic hermetic; used for MEMS Plastic Near-hermetic; limited use for MEMS Finishes for die attach/bonding Ag Pd Au Ni Multiple
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8 Chip Carriers Chip Carrier: a packaging system for electronic chips (IC’s) that provides protection and a practical means of connecting to circuitry. Fan Out: 2 nd Level interconnect fans outward from 1 st level Fan In: Conductor and Dielectric First - 1964 A flex-based package
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9 Area Array Packages Flip Chip LGA (Land Grid Array); leadless chip carrier, QFN PGA (Pin Grid Array) BGA (Ball Grid Array) Micro-BGA (CSP)
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10 Advanced Packaging Types Advanced BGAs Flex-Based MultiChip CSP Array Molded Wafer-Level CSP and FC PRODUCTIVITY
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11 Flip Chip Perimeter for small I/O count Area Array is much more effective MEMS potential Selective underfill MEMS
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12 Cofired Cast Molded Open (non-hermetic); chip carrier Ceramic Packages Used for MEMS Hermetic moderately expensive
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13 Organic Substrate Rigid; mostly epoxies (resin-glass) FR4 conventional FR4 type non-halogenated BT (Bismaleimide-triazine) New non-epoxy halogen-free products Flexible Polyimide LCP Limited use for MEMS Non-hermetic Lowest cost
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14 MultiChip Packages Traditional Stacked Single-Plane Cavity type used MEMS + ASIC, other Infineon MEMS mic + ASIC chip
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15 Bond die (chip) to base; die attach) 1 st Level connect chip; wire bonding Enclosure; encapsulant Packaging Steps
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16 Wire Bonding (WB) Most common connection Gold ball bonding dominants (~ 93%) Features PProgrammable; handles die and package change VVery versatile UUniversal method FFast, automatic, equipment makers keeping pace FFully mechanical process CClean; no pollution, waste, hazardous materials WWell-suited for MEMS/MOEMS
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17 Package Protection Fabricated cavity enclosure; metal, plastic, ceramic Transfer Molding Compounds (solids) Glob Top; free flow encapsulant Dam & Fill encapsulants Cavity fill encapsulants Underfill; 4 basic classes Underfill + encapsulant Injection molded cavity packages; near-hermetic Most can’t be used for MEMS
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18 BGA DIE encapsulants: for protection & handling Only suitable for capped MEMS CAP MEMS
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19 Session Summary Packaging is very dynamic today The package is all about metal & dielectrics Challenges are greater than ever Chip advances push performance WLP is finally gathering momentum MEMS is opening up a new packaging industry
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