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Field Effect Transistors Topics Covered in Chapter 30 30-1: JFETs and Their Characteristics 30-2: Biasing Techniques for JFETs 30-3: JFET Amplifiers 30-4:

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Presentation on theme: "Field Effect Transistors Topics Covered in Chapter 30 30-1: JFETs and Their Characteristics 30-2: Biasing Techniques for JFETs 30-3: JFET Amplifiers 30-4:"— Presentation transcript:

1 Field Effect Transistors Topics Covered in Chapter 30 30-1: JFETs and Their Characteristics 30-2: Biasing Techniques for JFETs 30-3: JFET Amplifiers 30-4: MOSFETs and Their Characteristics 30-5: MOSFET Biasing Techniques 30-6: Handling MOSFETs Chapter 30 © 2007 The McGraw-Hill Companies, Inc. All rights reserved.

2 30-1: JFETs and Their Characteristics  Fig. 30-1 (a) in the next slide, shows the construction of an n-channel JFET.  There are four leads: the drain, source, and two gates.  The area between the source and drain terminals is called the channel.  Because n-type semiconductor material is used for the channel, the device is called an n-channel JFET.  Embedded on each side of the n-channel are two smaller p-type regions called gates. McGraw-Hill© 2007 The McGraw-Hill Companies, Inc. All rights reserved.

3 30-1: JFETs and Their Characteristics Copyright © The McGraw-Hill Companies, Inc. Permission required for reproduction or display. Fig. 30-1 JFET N-Channel P-Channel

4 30-1: JFETs and Their Characteristics Copyright © The McGraw-Hill Companies, Inc. Permission required for reproduction or display. Fig. 30-2 (a) Fig. 30-2 (b)  Fig. 30-2 (a) is the schematic symbol for the n-channel JFET, and Fig. 30-2 (b) shows the symbol for the p-channel JFET.  The only difference is the direction of the arrow on the gate lead.

5 30-1: JFETs and Their Characteristics Copyright © The McGraw-Hill Companies, Inc. Permission required for reproduction or display. Fig. 30-3  Fig. 30-3 illustrates the current flow in an n-channel JFET with p- type gates disconnected.  The amount of current depends upon two factors:  The value of the drain- source voltage, V DS  The drain-source resistance, designated r DS

6 30-1: JFETs and Their Characteristics Copyright © The McGraw-Hill Companies, Inc. Permission required for reproduction or display. Fig. 30-4  The gate regions in a JFET are embedded on each side of the channel to help control the amount of current flow in the channel.  Fig. 30-4 (a) shows an n-channel JFET with both gates shorted to the source.  Fig. 30-4 (b) shows how an n-channel JFET is normally biased.

7 30-1: JFETs and Their Characteristics Copyright © The McGraw-Hill Companies, Inc. Permission required for reproduction or display. Fig. 30-5 (a) (c)  Fig. 30-5 (a) shows an n-channel JFET connected to the proper biasing voltages.  The drain is positive and the gate is negative, creating the depletion layers.  Fig. 30-5 (c) shows a complete set of drain curves for the JFET in Fig. 30-5 (a).

8 30-2: Biasing Techniques for JFETs  Many techniques can be used to bias JFETs.  In all cases, the gate-source junction is reverse- biased.  The most common biasing techniques are  Gate  Self  Voltage-divider  Current-source

9 30-2: Biasing Techniques for JFETs Copyright © The McGraw-Hill Companies, Inc. Permission required for reproduction or display. Fig. 30-7  Fig. 30-7 (a) shows an example of gate bias.  Fig. 30-7 (b) shows how an ac signal is coupled to the gate of a JFET.  If R G were omitted, as shown in (c), no ac signal would appear at the gate because V GG is at ground for ac signals.

10 30-2: Biasing Techniques for JFETs Copyright © The McGraw-Hill Companies, Inc. Permission required for reproduction or display. Fig. 30-8  One of the most common ways to bias a JFET is with self-bias. (See Fig. 30-8 a)  Only a single power supply is used, the drain supply voltage, V DD.

11 30-2: Biasing Techniques for JFETs Copyright © The McGraw-Hill Companies, Inc. Permission required for reproduction or display. Fig. 30-9  Fig. 30-9 shows a JFET with voltage-divider bias.  Since the gate-source junction has extremely high resistance, the R 1 – R 2 voltage divider is practically unloaded.  Voltage-divider bias is more stable than either gate or self-bias.

12 30-2: Biasing Techniques for JFETs Copyright © The McGraw-Hill Companies, Inc. Permission required for reproduction or display. Fig. 30-10  Fig. 30-10 shows one of the best ways to bias JFETs, called current- source bias.  The npn transistor with emitter bias acts like a current source for the JFET.  The drain current, I D, equals the collector current, I C, which is independent of the value of V GS.

13 30-3: JFET Amplifiers  JFETs are commonly used to amplify small ac signals.  One reason for using a JFET instead of a bipolar transistor is that very high input impedance, Z in, can be obtained.  A big disadvantage, however, is that the voltage gain, A V, obtainable with a JFET is much smaller.  JFET amplifier configurations are as follows:  Common-source (CS)  Common-gate (CG)  Common-drain (CD)

14 30-3: JFET Amplifiers Copyright © The McGraw-Hill Companies, Inc. Permission required for reproduction or display. Fig. 30-12 (a)  Fig. 30-12 (a) shows a common-source amplifier.  For a common-source amplifier, the input voltage is applied to the gate and the output is taken at the drain.

15 30-3: JFET Amplifiers Copyright © The McGraw-Hill Companies, Inc. Permission required for reproduction or display. Fig. 30-12 (b)  The ac equivalent circuit is shown in Fig. 30-12 (b)  On the input side, R G = Z in, which is 1 MΩ.  This occurs because with practically zero gate current, the gate-source resistance, designated R GS, approaches infinity.

16 30-3: JFET Amplifiers Copyright © The McGraw-Hill Companies, Inc. Permission required for reproduction or display. Fig. 30-13 (a)  Fig. 30-13 (a) shows a common-drain amplifier, usually referred to as a source follower.  A source follower has a high input impedance, low output impedance, and a voltage gain of less than one, or unity.

17 30-3: JFET Amplifiers Copyright © The McGraw-Hill Companies, Inc. Permission required for reproduction or display. Fig. 30-14 (a)  A common-gate amplifier has a moderate voltage gain.  Its big drawback is that Z in is quite low.  Fig. 30-14 (a) shows a CG amplifier.

18 30-4: MOSFETs and Their Characteristics  The metal-oxide semiconductor field effect transistor has a gate, source, and drain just like the JFET.  The drain current in a MOSFET is controlled by the gate-source voltage V GS.  There are two basic types of MOSFETS: the enhancement-type and the depletion-type.  The enhancement-type MOSFET is usually referred to as an E-MOSFET, and the depletion-type, a D- MOSFET.  The MOSFET is also referred to as an IGFET because the gate is insulated from the channel.

19 30-4: MOSFETs and Their Characteristics Copyright © The McGraw-Hill Companies, Inc. Permission required for reproduction or display. Fig. 30-15  Fig. 30-15 (a) shows the construction of an n-channel depletion-type MOSFET, and Fig. 30-15 (b) shows the schematic symbol.

20 30-4: MOSFETs and Their Characteristics Copyright © The McGraw-Hill Companies, Inc. Permission required for reproduction or display. Fig. 30-19  Fig. 30-19 shows the construction and schematic symbol for a p- channel, depletion-type MOSFET.  Fig. 30-19 (a) shows that the channel is made of p-type semiconductor material and the substrate is made of n-type semiconductor material.  Fig. 30-19 (b) shows the schematic symbol.

21 30-4: MOSFETs and Their Characteristics Copyright © The McGraw-Hill Companies, Inc. Permission required for reproduction or display. Fig. 30-20 (a)  Fig. 30-20 (a) shows the construction of an n-channel, enhancement-type MOSFET.  The p-type substrate makes contact with the SiO 2 insulator.  Because of this, there is no channel for conduction between the drain and source terminals.

22 30-5: MOSFET Biasing Techniques  Zero-bias can be used only with depletion-type MOSFETs.  Even though zero bias is the most commonly used technique for biasing depletion-type MOSFETs, other techniques can also be used.  Biasing techniques include  Self  Voltage-divider  Current-source  Drain-feedback bias is often used to bias E-MOSFETs

23 30-5: MOSFET Biasing Techniques Copyright © The McGraw-Hill Companies, Inc. Permission required for reproduction or display. Fig. 30-22 (a)  Fig. 30-22 (a) shows a popular biasing technique that can be used only with depletion-type MOSFETs.  This form of bias is called zero bias because the potential difference between the gate-source region is zero.

24 30-6: Handling MOSFETs  One disadvantage of MOSFET devices is their extreme sensitivity to electrostatic discharge (ESD) due to their insulated gate-source regions.  The SiO 2 insulating layer is extremely thin and can be easily punctured by an electrostatic discharge.  The following is a list of MOSFET handling precautions  Never insert or remove MOSFETs from a circuit with the power on.

25 30-6: Handling MOSFETs  MOSFET handling precautions (Continued)  Never apply input signals when the dc power supply is off.  Wear a grounding strap on your wrist when handling MOSFET devices.  When storing MOSFETs, keep the device leads in contact with conductive foam, or connect a shorting ring around the leads.


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