1. Metal-Oxide- Semiconductor (MOS) Field-Effect Transistors (MOSFETs)
EENG 3510 Chapter 4
Metal-Oxide- Semiconductor (MOS) Field-Effect Transistors (MOSFETs)

2. 4.42(a for Figures (a) & (b), assume saturation in (a)),
Chapter 4 Homework 4a
4.5, 4.7a&b, D4.14, D4.34, 4.36,
4.42(a for Figures (a) & (b), assume saturation in (a)),

3. Chapter 4 Homework 4b
4.51, 4.59, 4.58, 4.64a, 4.69, 4.99

4. Introduction From Diode to Transistor Two types of Transistors Topics
Two terminals to three terminals
Use of the voltage between two terminals to control the current flowing in the third terminal
Two types of Transistors
MOSFETs: metal oxide semiconductor field effect transistors (chapter 4)
BJT: bipolar junction transistor (chapter 5)
Topics
Physical structure and operations
Terminal characteristics
Circuit models
Basic circuit applications: amplifier and logic inverter

5. Metal-Oxide- Semiconductor (MOS) Field-Effect Transistors (MOSFETs)
Most important component in modern digital integrated circuits
Used in microprocessors
Used in computer memory

6. 4.1 Device Structure and Physical Operation (Physical structure of the enhancement-type NMOS transistor)
cross-section
perspective view
Typically L = 0.1 to 3 mm, W = 0.2 to 100 mm, and the thickness of the oxide layer (tox) is in the range of 2 to 50 nm.

7. 4.1 Device Structure and Physical Operation
Source (S) connects to Body (B), Drain (D) is at a positive voltage relative to S, two pn junctions are cut off
Substrate: no effect on device operation →3 terminals device
Source and drain can be interchanged

8. 4.1.4 Applying a Small VDS
An NMOS transistor with vGS (gate voltage) > Vt (threshold voltage)and with a small vDS applied. The device acts as a resistance whose value is determined by vGS. Specifically, the channel conductance is proportional to vGS – Vt’ and thus iD is proportional to (vGS – Vt) vDS. Note that the depletion region is not shown (for simplicity).

9. 4.1.4 Applying a Small VDS (Cont.)
The iD (drain current) – vDS (drain voltage) characteristics of the MOSFET in the above slide when the voltage applied between drain and source, vDS, (drain source) is kept small. The device operates as a linear resistor whose value is controlled by vGS (gate source).

10. 4.1.5 Operation as VDS Is Increased
Operation of the enhancement NMOS transistor as vDS is increased. The induced channel acquires a tapered shape, and its resistance increases as vDS is increased. Here, vGS is kept constant at a value > Vt.

11. 4.1.6 Derivation of the ID –VDS relationship
The drain current iD versus the drain-to-source voltage vDS for an enhancement-type NMOS transistor operated with vGS > Vt.

12. 4.1.8 Complementary MOS or CMOS
Cross-section of a CMOS integrated circuit. Note that the PMOS transistor is formed in a separate n-type region, known as an n well. Another arrangement is also possible in which an n-type body is used and the n device is formed in a p well.

13. Symbols for enhancement-type MOSFETs

14. 4.2 Current-Voltage Characteristics 4.2.1 Circuit Symbol
(a) Circuit symbol for the n-channel enhancement-type MOSFET. (b) Modified circuit symbol with an arrowhead on the source terminal to distinguish it from the drain and to indicate device polarity (i.e., n channel). (c) Simplified circuit symbol to be used when the source is connected to the body or when the effect of the body on device operation is unimportant.

15. 4.2.2 The ID –vDS Characteristics
There are three distinct regions of operation:
The cut-off region
The triode region
The saturation region

16. 4.2.2 The ID –vDS Characteristics (Cont.)
(a) An n-channel enhancement-type MOSFET with vGS and vDS applied and with the normal directions of current flow indicated. (b) The iD–vDS characteristics for a device with k’n (W/L) = 1.0 mA/V2.

17. 4.2.2 The ID –vDS Characteristics (Cont.)
Cut off region

18. 4.2.2 The ID –vDS Characteristics (Cont.)
Triode region
The N-channel enhancement-type MOSFET
Operates in the triode region when vGS is greater
than Vi and the drain voltage is lower than the
gate voltage by at least Vt .

19. Triode Region Example

20. Triode Region Example (Cont.)

21. Problem 4.7c&d

22. Problem 4.7c&d (Cont.)
ox for silicon = 3.45x10-11

23. 4.2.2 The ID –vDS Characteristics (Cont.)
Saturation region
The N-channel enhancement-type MOSFET
Operates in the saturation region when vGS is
greater than Vi and the drain voltage does not fall below the gate voltage by more than Vt .

24. Saturation Region Example

25. 4.2.2 The ID –vDS Characteristics (Cont.)
Saturation region
The iD–vGS characteristic for an enhancement-type NMOS transistor in saturation (Vt = 1 V, k’n W/L = 1.0 mA/V2).

26. 4.2.2 The ID –vDS Characteristics (Cont.)
Large-signal equivalent-circuit model of an n-channel MOSFET operating in the saturation region

27. 4.2.3 Finite Output Resistance in Saturation
IDEAL: a change vDS causes zero change in ID , which means infinite output resistance
Increasing vDS beyond vDSsat causes the channel pinch-off point to move slightly away from the drain, thus reducing the effective channel length (by L).

28. 4.2.3 Finite Output Resistance in Saturation
Eq. 4.22
Eq. 4.24
Large-signal equivalent circuit model of the n-channel MOSFET in saturation, incorporating the output resistance ro. The output resistance models the linear dependence of iD on vDS and is given by Eq. (4.22).

29. 4.3 MOSFET Circuit At DC

30. Example 4.2
Design the circuit of Fig so that the transistor operates at ID=0.4mA and VD=+0.5V. The NMOS transistor has Vt=0.7V, μnCox=100 μA/V2, L = 1 μm, and W=32 μm. Neglect the channel-length modulation effect (i.e. assume that λ=0).
RD= ?, RS = ?

31. Example 4.2 (Cont.)

32. Example 4.2 (Cont.)

33. Another Design Example
Figure 1

34. Example 4.4
Design the circuit in Fig to establish a drain voltage of 0.1 V. What is the effective resistance between drain and source at this operating point? Let Vt=1 V, k’nW/L=1mA/V2.

35. Example 4.4 (Cont.)

36. Example 4.4 (Cont.)

37. Another Design Example
Assume saturation
Figure 2

38. Figure (c) Assume saturation ID = 2 = (½)(1)(Vov)2) (Vov)2 = 4
Vov = 2 , However, Vov = -2 V since pmos circuit
VGS = Vt + Vov = = - 4
Thus Vs = 4 V = V4
V5 = ( - (2.5x103)(2x10-3)) = = -5 V

39. Figure (d) ID = 2 = (½)(1)(Vov)2) (Vov)2 = 4
Vov = 2 , However, Vov = -2 V since pmos circuit
VGS = Vt + Vov = = - 4 , Vs = 4
V6 = 10 – 4 = 6 V
V7 = 6 – 4 = 2 V

40. 4.4 The MOSFET As An Amplifier and As A Switch

41. 4.4.1 Large-signal Operation –The Transfer Characteristic
Common Source Amplifier (CS)
To determine the voltage transfer
characteristic between vI and vO
VI = vGS
VO = vDS = VDD - RD iD
Graphically and analytically
Basic structure of the common-source amplifier
Graphical construction to determine the transfer characteristic of the amplifier in (a).
vDS= VDD-RDiD
iD= (VDD-vDS)/RD

42. 4.4.2 Graphical Derivation of the Transfer Characteristic
Transfer characteristic showing operation as an amplifier biased at point Q.

43. 4.4.3 Operation As Switch

44. 4.4.4 Operation as a Linear Amplifier
Two load lines and corresponding bias points. Bias point Q1 does not leave sufficient room for positive signal swing at the drain (too close to VDD). Bias point Q2 is too close to the boundary of the triode region and might not allow for sufficient negative signal swing.

45. 4.4.5 Analytical Expressions for the Transfer Characteristic
Cutoff-Region Segment, XA
vI< Vt, and vO= VDD

46. 4.4.5 Analytical Expressions for the Transfer Characteristic (Cont.)
Saturation-Region Segment, AQB
Av = - 2 (VDD – VOQ) / VOV = - (2VRD) / VOV

47. Example

48. Example (Cont.)
Av = - 2 (VDD – VOQ) / VOV = - (2VRD) / VOV

49. 4.4.5 Analytical Expressions for the Transfer Characteristic (Cont.)
Triode-Region Segment, BC

50. 4.5 Biasing In MOS Amplifier Circuits

51. 4.5.1 Biasing by Fixing VGS Most straightforward Device dependent
Temperature dependent
Variability
The use of fixed bias (constant VGS) can result in a large variability in the value of ID. Devices 1 and 2 represent extremes among units of the same type.

52. 4.5.2 Biasing by Fixing VG and Connecting a Resistance in the Source
Reduced Variability
Biasing using a fixed voltage at the gate, VG, and a resistance in the source lead, RS: (a)basic arrangement; (b)reduced variability in ID;

53. 4.5.2 Biasing by Fixing VG and Connecting a Resistance in the Source (Cont.)
Biasing using a fixed voltage at the gate, VG, and a resistance in the source lead, RS: (c) practical implementation using a single supply; (d) coupling of a signal source to the gate using a capacitor CC1; (e) practical implementation using two supplies.

54. Example 6
Bias current does not change

55. Example

56. 4.5.3 Biasing Using a Drain-to-Gate Feedback Resistor
Biasing the MOSFET using a large drain-to-gate feedback resistance, RG.

57. Problem 4.64b

58. 4.5.4 Biasing Using a Constant-Current Source
Biasing the MOSFET using a constant-current source I.
Implementation of the constant-current source I using a current mirror.

59. 4.5.4 Biasing Using a Constant-Current Source (Cont.)

60. 4.6 Small-Signal Operation And Models

61. 4.6.1 The DC Bias Point
Set vgs to zero
Conceptual circuit utilized to study the operation of the MOSFET as a small-signal amplifier.

62. 4.6.2 The Signal Current in the Drain Terminal
Conceptual circuit utilized to study the operation of the MOSFET as a small-signal amplifier.
iD = the instantaneous drain current
ID = the DC Bias Current
To reduce nonlinear distortion, the input signal should be kept small so that: VO

63. 4.6.3 The Voltage Gain
Conceptual circuit utilized to study the operation of the MOSFET as a small-signal amplifier.

64. 4.6.4 Separating the DC Analysis and the Signal Analysis
Conceptual circuit utilized to study the operation of the MOSFET as a small-signal amplifier.

65. 4.6.5 Small Signal Equivalent-Circuit Models
neglecting the dependence of iD on vDS in saturation (the channel-length modulation effect)
including the effect of channel-length modulation, modeled by output resistance ro = |VA| /ID.
VA = 1/ (where  = the channel-length
modulation effect)
r0 = 10K to 1000K

66. 4.6.6 The Transconductance gm
In contrast, gm for a bipolar junction transistor (BJT) is
proportional to ID and is
independent of the physical size
And geometry of the device.

67. Example

68. Example a
ID = (1/2) x 1 x (5 – 1)2
2ID = 42 = 16
ID = 8 mA

69. Example b
Gm = 1 x (5 – 1) = 4 mA/V

70. Example c
AV = - 4mA x 4K = -16 V/V

71. Example d AV = - 4mA x (4K || 12.5K) = - 3.03 V/V
output resistance ro = |VA| /ID
VA = 1/ (where  = the channel-length
modulation effect)
rO = 1 / (0.01 x 8mA) = 1 / 0.08mA = 12.5 K
AV = - 4mA x (4K || 12.5K) = V/V

72. 4.6.7 The T Equivalent-Circuit Model
Development of the T equivalent-circuit model for the MOSFET. For simplicity, ro has been omitted but can be added between D and S in the T model of (d).

73. 4.6.7 The T Equivalent-Circuit Model (cont.)
The T model of the MOSFET augmented with the drain-to-source resistance ro.
An alternative representation of the T model.

74. 4.6.9 Summary Small Signal Parameters Transconductance:
Output Resistance:
Small Signal Equivalent Circuit Models
Hybrid-π model
T models

75. 4.7 Single-Stage MOS Amplifiers

76. 4.7.1 The Basic Structure
Basic structure of the circuit used to realize single-stage discrete-circuit MOS amplifier configurations

77. 4.7.2 Characterizing Amplifiers

78. 4.7.2 Characterizing Amplifiers (cont.)

79. 4.7.2 Characterizing Amplifiers (cont.)

80. 4.7.3 The Common-Source (CS) Amplifier

81. 4.7.3 The Common-Source (CS) Amplifier (cont.)

82. 4.7.3 The Common-Source (CS) Amplifier (cont.)

83. 4.7.4 The Common-Source Amplifier with a Source Resistance
Common-source amplifier with a resistance RS in the source lead.
Small-signal equivalent circuit with ro neglected.

84. 4.7.4 The Common-Source Amplifier with a Source Resistance

85. Problem 77

86. Problem 77a VG = 15 x (5/15) = 5 V VS = 3ID = VGS = 5 - 3ID
ID = (1/2)(2)(5 - 3ID - 1)2
0 = ID + 9ID2
ID = 1 mA
VGS = 5 - 3ID = 2 V
VD = 15 – (7.5K x 1mA) = 7.5 V

87. Problem 77b Gm = 2 ID / VOV = (2 x 1) /(2 – 1) = 2 mA
rO = VA / ID = 100/1mA = 100K

88. Problem 77c

89. Problem 77d x x

90. 4.7.5 The Common-Gate (CG) Amplifier

91. 4.7.5 The Common-Gate (CG) Amplifier (cont.)

92. 4.7.6 The Common-Drain (CD) or Source-Follower Amplifier

93. 4.7.6 The Common-Drain (CD) or Source-Follower Amplifier (cont.)

94. 4.7.6 Summary and Comparisons

95. 4.7.6 Summary and Comparisons (cont.)

96. 4.7.6 Summary and Comparisons (cont.)

97. 4.7.6 Summary and Comparisons (cont.)