1. Department of Electrical & Computer Engineering 1 ES585a - Computer Based Power System Protection Course by Dr.T.S.Sidhu - Fall 2005 Class discussion presentation by Vijayasarathi Muthukrishnan 25 th October 2005

2. Department of Electrical & Computer Engineering 2 Types of A/D Converters

3. Department of Electrical & Computer Engineering 3 Recap of terminology Over-sampling Noise shaping Introducing Sigma-Delta Converters (ADC) Functional description & Simulations Comparison with other converters Applications & Relevance to Protection industry

4. Department of Electrical & Computer Engineering 4 Sampling Sampling rate & Nyquist interval Quantization Quantizer resolution Quantization error Quantization noise

5. Department of Electrical & Computer Engineering 5 Sampling at a higher rate which is a larger multiple of normal Nyquist rate. Example: F max = 60 Hz Minimum sampling rate Fs = 120 Hz (Nyquist rate) Over sampling rate Fs’ = 7680 Hz (Say 64*fs)

6. Department of Electrical & Computer Engineering 6 Anti-aliasing filter requirements are greatly reduced. Reduces the quantization noise within the frequency range of interest.

7. Department of Electrical & Computer Engineering 7 MagnitudeFrequency Frequency spectrum for Normal sampling condition Fs With Sharp cut-off Anti-aliasing filter F max Magnitude Frequency Frequency spectrum for Over-sampling condition Fs ‘ With Wide roll-off Anti-aliasing filter F max

8. Department of Electrical & Computer Engineering 8 Quantization noise - Nyquist rate sampling

9. Department of Electrical & Computer Engineering 9 Quantization noise – Over sampling

10. Department of Electrical & Computer Engineering 10 Quantization noise after filtering

11. Department of Electrical & Computer Engineering 11 The efficiency of Noise reduction is increased in the frequency range of interest if Noise shaping filters are used in an over sampled system. These filters reduce the quantization noise by pushing them out of the frequency range of interest.

12. Department of Electrical & Computer Engineering 12 High resolution low cost ADC. Made possible by the chips that integrate both analog and digital circuitry. Over sampling and Noise shaping concepts are applied. Circuit uses Comparators (Delta) and Integrators (Sigma) and so the name : “DELTA-SIGMA or SIGMA-DELTA”

13. Department of Electrical & Computer Engineering 13 1 Bit DAC 1-Bit stream (1 or 0) +1 or -1 volt

14. Department of Electrical & Computer Engineering 14 X2 = X1-X5 X3 = X2 + X3(n-1) IF X3 > 0IF X3 < 0 X4 = 1 X4 = 0 X5 = +1 X5 = -1 X1

15. Department of Electrical & Computer Engineering 15 X1X2X3X4X5 0011 0.5-0.5 0 0.61.61.111 0.7-0.30.811 -0.20.611 0.9-0.10.511 10 11 0.9-0.10.411 0.8-0.20.211 0.7-0.3-0.10 0.61.6`.511 0.5-0.5111 0.3-0.70.311 0-0.70 -0.20.80.111 -0.4-1.4-1.30 -0.60.4-0.90 -0.80.2-0.70 0-0.70 -0.80.2-0.50 -0.61.61.111 -0.4-1.4-0.30 -0.20.80.511 0-0.50 Density of ones is more when the input is more positive. Density of zeros is more when input is more negative.

16. Department of Electrical & Computer Engineering 16 Fs’ = 32*Fs

17. Department of Electrical & Computer Engineering 17 Fs’ = 64*Fs

18. Department of Electrical & Computer Engineering 18 The input is an analog signal over sampled at Fs’. Use of 1-bit ADC simplifies the structure. The output of this ADC is a stream of 1 bit data i.e. 1s & 0s generated at very high clock rate which is nothing but Fs’ The feedback loop ensures that the average output level is equal to the input signal level. A decimation filter is used to average and get the digital output from the stream of one bits. The resolution at converter output i.e. no of bits is also increased after decimation.

19. Department of Electrical & Computer Engineering 19 Everything is in Digital domain : Low pass filter + Down sampler. Acts as a low pass filter and removes the high frequency quantization noise and other remains of high frequency components. Averages the stream of one bits Finally reduction to original sampling rate Fs from over sampled rate Fs’ Higher bit resolution is also achieved

20. Department of Electrical & Computer Engineering 20 SIGMA – DELTA BLOCK DECIMATION FILTER Analog input 1100000110000011 Avg.= (6/16 )= 0.375 0110 16 - one bit stream One 4 - bit representation 16:1 Decimation Over sampled at 16 times

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24. Department of Electrical & Computer Engineering 24 Z-domain analysis of this converter reveals that the noise is High-pass filtered [H n (Z) = (Z-1)/Z] i.e. noise is pushed out of our range of interest. Low pass filtering in Decimation filter removes all out of band noise leading to very minimum noise within our range of interest.

25. Department of Electrical & Computer Engineering 25 Merits –High resolution at Low cost –Very efficient noise handling –Less stringent Anti-aliasing filter requirements Demerits –Several clock cycles settling time or latency due to delays in digital filtering stage –Longer conversion time, typically 100000 samples/s for 16-bit resolution and 1000 samples/s for 24-bit resolution –Limited to low frequency applications as over sampling becomes tough for high frequency applications

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27. Department of Electrical & Computer Engineering 27 Process applications Temperature measurements Digital Audio CD system applications Latency is the major issue which keeps the protection industry away from sigma delta ADC

28. Department of Electrical & Computer Engineering 28 An over view of sigma delta converters – IEEE Signal Processing Magazine, 1996 Motorola Sigma Delta converter – Application note MAXIM Semiconductors Sigma delta converter – Application note Intersil corporation Sigma Delta converter– Application note ‘Introduction to Signal Processing’ book by Sophocles J. Orfanidis ‘Understanding DSP’ book by Richard G.Lyons

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