1. Analytical Modeling of RF Noise in MOSFETs – A Review
S. Asgaran and M. Jamal Deen
Electrical and Computer Engineering, CRL 226
McMaster University, Hamilton, ON L8S 4K1, Canada

2. RF Performance of MOSFETs
DUTs are fabricated in 0.18mm CMOS technology and measured at VDS = 1V
Maximum fT is around 50 GHz and the best NFmin is about 0.5 dB at 2 GHz

3. Noise in MOSFETs

4. Why Does Noise Matter distance
The battery life time and the distance between the wireless components will be limited by the noise floor of the front-end amplifier.

5. Outline Introduction Noise sources
RF MOSFET noise models: long and short channel – only explicit analytical models are discussed
Induced gate noise
Applications of models to design
Conclusions

6. Introduction Why CMOS for RF? Low cost High integration
Integration with digital IC (SoC)
Technology advancement
higher frequencies
J.C. Rudell, J-J. Ou, T.B. Cho, G. Chien, F. Brianti, J.A. Weldon, P.R. Gray, A 1.9-GHz wide-band IF double conversion CMOS receiver for cordless telephone applications IEEE Journal of Solid-State Circuits, Vol. 32, pp , Dec. 1997

7. Noise Sources in MOSFETRD RS RG
RSB
RDB
SiRDB
SiRSB
SiRDSB
RDSB
CBD
CBS
RDS
SiD
SiRD
SiRS
Ims Im
CGD
CGS
CGB
SiG
SvRG G S B D
88%
0.25mm technology
SiD ~ Lch-1
RSUB ~20% total Sin
RG ~5% total Sin
L=0.18 mm, f=3 GHz
A.J. Scholten et al, Noise modeling for RF CMOS circuit simulation, IEEE Trans. Electron Devices, Vol. 50, pp , Mar
In EKV model, MOSFET is divided into an intrinsic part and an extrinsic part consisting of the parasitics elements. The intrinsic part is modelled by a charge based model for dc, ac, NQS and noise behavior valid in all regions.
Extrinsic model includes terminal access reistsnaces and parasitic capacitances. Accounts for signal coupling at RF from D to S an B through junction capacitances.
Validated in .25 micron CMOS – Y-parameters, transit frequency, noise parameters and RF large signal characteristics.
Substrate and gate resistance contribute 20% and 5% of total input referred noise
NFmin good agreement up to 0.3 f/fT.
Philips model – equation given
Assumptions – channel carriers are in thermal equilibrium so that voltage noise spectral density is 4kt.dx/g(V) and noise sources in different channel segments are uncorrelated
G(V) is evaluated using a continuous description of the surface potential of the MOSFET for all operating regions
Discrepancies up to 20% at lower frequencies for short channel devices were found, but is not understood – possibly due to gate or bulk parasitics.
Noise for longer channel devices dependent of frequency – possibly due to nonquasistatic effects
C. Enz, An MOS transistor model for RF IC design valid in all regions of operation IEEE Trans. Microwave Theory Tech., Vol. 50, pp , Jan
SiD: Channel noise + flicker noise
SiG: Induced gate noise
SiR: Thermal noise of real resistances
~20% discrepancy for 0.18mm, low f
SiD increases with f in 2mm FET
No dependence on VDS in saturation

8. Noise Models- Long Channel Case
Klaassen-Prins:
Integrating the noise current over the entire channel
Van der ziel:
Includes hot electron effects
Te: a function of E(x)
Tsividis:
Simpler model

9. Noise Models - Short Channel2 4 6 8 10 12 16 20
Channel Length (mm)
iD (Amp/Hz1/2)
VGS=0.7, 0.9, 1.1, 1.3, 1.9V
VDS=2.5V G S D
Leff,VDS
(II)
Lsat,VDSat DL
(I)
P. Klein, An analytical thermal noise model of deep submicron MOSFET’s, IEEE Electron Dev. Letters, Vol. 20, pp , Aug
vsat~107cm/s
t~4.3ps
SID ~ indep. of VDS
Increased noise in short channel devices
A divided channel is used
Linear region (GCA)
Velocity saturation region; thermal assumption questionable

10. Drain Current Noise (Amp2/Hz)
RF MOSFET Noise Models
Triantis et al is
questionable! gDS is not constant
Te: in both parts of the channel
thermal noise source in vel. sat. region: questionable! DrD is an ac resistance
Old measurements (Abidi, ‘86) used
SID ~ indep. of VDS (< 1.5x) 1 2 3 4 5 6
10-24
10-23
10-22
10-21
Region II noise
Region I noise
Total noise
VGS (V)
Drain Current Noise (Amp2/Hz)
VDS=4V
Measurement
W=30mm; L=0.7mm
D.P. Triantis, A.N. Birbas and D. Kondis, Thermal noise modeling for short-channnel MOSFET’s, IEEE Trans. Electron Devices, Vol. 43, no. 11, pp , Nov
Note: Region II noise increases with VGS; device is less saturated
Note: Calculations > measurements

11. Drain Current Noise (Amp2/Hz)
RF MOSFET Noise Models
Park and Park
Mobility degradation due to channel field absent
Carrier temperature, Te, used to model hot carrier effects
Noise of VS region: intrinsic diffusion noise
SiD=g2DS×(SvI+SvII) - questionable!
Measurements (Abidi, ‘86)
Temp:
d~5-20 for EC=2-4V/mm
VGS (V) 1 2 3 4 5
10-24
10-23
10-22
10-21
Region II noise
Triantis
Region I noise
Park & Park
Total noise - Triantis
Drain Current Noise (Amp2/Hz)
VDS=4V
Measurement
= 1+DVT/DVSB – coefficient to consider effect of body bias on VT
VC = voltage at pinch-of point
a=1.25, vsat=9x106cm/s, xj=0.25mm; d=5, mo=650cm2/Vs; D=350cm2/s
g=3.57 (3V) to 2.98(5V) with VGS and g=2.98 (4V) to 4.52(5V) with VDS
C.H. Park and Y.J. Park, Modeling of thermal noise in short-channel MOSFETs at saturation, Solid-State Electronics, Vol. 44, pp , 2000.

12. RF MOSFET Noise Models Knoblinger et al Te: in both parts of channel
meff=v(x)/E(x) in both parts of the channel: wrong!
G. Knoblinger, P. Klein & H. Tiebout, A new model for thermal channel noise of deep-submicron MOSFETs and its application in RF-CMOS design , IEEE J. Solid-State Cir., vol. 36, pp , May 2001. S D
Leff,VDS
(II)
Lsat,VDSat DL
(I) G
d~1.0 and noise from region Ia (T=lattice temperature) gave better fit to data at VGS>1.5V

13. RF MOSFET Noise Models Scholten et al CLM not taken into account
Te is not needed!
A.J. Scholten et al, Accurate thermal noise model for deep-submicron CMOS, IEDM Tech. Digest, pp , 1999.

14. RF MOSFET Noise Models Chen & Deen
Channel length modulation (CLM) is accounted for
d=0 in experiments
no Te needed
No noise from VS region
C.H. Chen and M.J. Deen, Channel noise modeling of deep submicron MOSFETs, IEEE Trans. Electron Devices, vol. 49, pp , Aug

15. RF MOSFET Noise Models Scholten et al Modified Klaassen-Prins
Takes into account CLM
No noise from VS region
A closed-form solution as a function of surface potential - too complicated! Difficult to provide insight to designers
Not accurate for short channels at high VGS
A.J. Scholten et al, Noise modeling for RF CMOS circuit simulation, IEEE Trans. Electron Devices, Vol. 50, pp , Mar

16. RF MOSFET Noise Models Han et al.
Considers the channel field effect on mobility
Starts from impedance field theory
Uses Einstein equation in MOSFET channel : questionable! MOSFET channel is degenerate in strong inversion
The result is based on thermal noise theory
K. Han, H.Shin and K. Lee, Analytical Drain Thermal Noise Current Model Valid for Deep Submicron MOSFETs, IEEE Trans. Electron Devices, vol. 51, pp , Feb

17. RF MOSFET Noise Models Dashed line is without this term
K. Han, H.Shin and K. Lee, Analytical Drain Thermal Noise Current Model Valid for Deep Submicron MOSFETs, IEEE Trans. Electron Devices, vol. 51, pp , Feb

18. RF MOSFET Noise Models Analytical ModelG S D
Leff,VDS
(II)
Lelec DL
(I)
Analytical Model
Based on simple analytical drain current expression
Includes the channel field effect
Purely analytical (no integration, etc.)
Suitable for circuit design

19. RF MOSFET Noise Models model Analytical model Analytical model
B. Wang, J.R. Hellums and C.G. Sodini, MOSFET thermal noise modeling for analog integrated circuits, IEEE JSSC vol. 29, pp , July 1994.

20. RF MOSFET Noise Models Noise and scaling
For very short channel devices

21. Induced Gate Noise Induced gate noise at x in channel where
Induced gate noise Dig(xo) is fully correlated with the channel thermal noise Did (xo)
VDS becomes VDSsat in the saturation mode
CGS
Did(xo)

22. SIG and Correlation Noise
8×10-23
1×10-22
L=0.97 mm
L=0.64 mm
6×10-23
L=0.97 mm
L=0.42 mm
1×10-23
L=0.27 mm
L=0.64 mm
Correlation Noise (A2/Hz)
SiG (A2/Hz)
L=0.18 mm
4×10-23
1×10-24
L=0.42 mm
2×10-23
L=0.27 mm
L=0.18 mm
1×10-25 1 10 1 2 3 4 5 6
Frequency (GHz)
Frequency (GHz)
MOSFET channel- RC network at high f
Gate capacitance and channel R
Channel noise coupled to the gate→ SIG, correlation noise
Frequency dependent
Negligible as the channel length shrinks
M.J. Deen, C.H. Chen and Y. Cheng, MOSFET Modeling for Low Noise, RF Circuit Design, Proceedings of IEEE CICC, pp , May 2002

23. Choosing Device Size Channel length of devices reduced
NFmin
gm,max
Channel length of devices reduced
Increased gm and peak value of gm occurs at lower VGS values
The faster increase in gm results in
Reduced NFmin and the lowest NFmin is shifted to lower VGS values

24. Choosing DC Bias Conditionsgm
NFmin
Higher VDS bias will increase gm at the higher VGS region
Higher gm will decrease NFmin at higher VGS region
Decreased NFmin at higher VGS makes lowest NFmin less sensitive to VGS

25. Concluding Remarks MOSFET channel noise analytical models discussed
Long channel case
Short channel case
Some ideas on how to use noise to design circuits
Future applications demand low power
MOSFET in moderate or weak inversion
Noise models needed in these regions

26. Acknowledgements Professor C.H. Chen (McMaster University)
Dr. Y. Cheng (Conexant/Skyworks)
Funding - Rockwell/Conexant/Skyworks, USA and Gennum, Canada
Funding - NSERC of Canada
Funding - Micronet
Funding - Canada Research Chair Program