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Radio-Frequency Effects in Integrated Circuits
Yun Bai Directed by Professor Neil Goldsman
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Abstract Tendency of IC evolvement: faster speed and higher chip density. Inductance of on-chip interconnects draws more attention in terms of signal transmission and circuit design. Skin effects and semiconductor substrate losses are considered. Electromagnetic coupling happens between on-chip components and affects circuit performance.
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Thesis Outline Introduction to Inductance
Characterization of On-Chip Interconnects Characterization of On-Chip Inductors High-Speed On-Chip Digital Signal Transmission Electromagnetic Coupling Effects
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Transmission Line Theory
freq > 1GHz Chip density > tens of millions of transistors RLC delay due to interconnects become significant Metal – SiO2 – Si – Ground Plane Distributed Circuit Model
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On-Chip Inductors Analog RF Circuits: Low Noise Amplifiers Mixers
Voltage-Controlled Oscillators Experimental EM Simulator Numerical Modeling Empirical Equations
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Electromagnetic Coupling
Bus Lines Interconnects EM Simulator Numerical Modeling Empirical Equations
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What is Inductance? Energy Definition: Magnetic Energy Storage
Flux Definition: Magnetic Flux Leakage Circuit Definition: Induced Voltage by AC Current
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Inductance Classification
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Internal Self-Inductance
Internal Impedance: Maxwell’s Equation: Skin Effect:
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External Self-Inductance
Average Flux: Loop Inductance
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Mutual Inductance Magnetic Vector Potential:
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What is L for an Interconnect
Internal + External
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Interconnect Internal Impedance
Current Distribution: 1D approximation:
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Complex Image Theory
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Interconnect External Impedance
Quasi-TEM Slow Mode
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Coupled Interconnects
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Mutual Impedance
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On-Chip Inductors
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Inductor Inductance N L S Na
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Inductor Resistance N L S Na
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Multi-Layer Spiral Higher Inductance Less Chip Area Higher Q Factor
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On-Chip Digital Transmission
rising/falling < 10 ps Vs = 1.26 V Each Box: 1 mm
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Signal Attenuation, Delay, Dispersion
1 GHz : 220 ps 9 GHz : 150 ps Critical Length: 8 mm
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Electromagnetic Coupling
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Scattering Parameters
S11: Insertion Loss at Port 1 when Port 2 is matched S21: Forward Gain from Port 1 to Port 2 when Port 2 is matched
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N-Wells
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Transformer
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Spiral and Transistor
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Digital Switching Noise
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Acknowledgement Professor Neil Goldsman
Our Group: Zeynep, Xi, Akin, Bo, … Committee: Professor Peckerar and Orloff
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