1. CPE 169 Digital Design Laboratory Digilent Inc. Nexys Development Board

2. Instructional Objectives: To learn about the features of the Digilent Development Board and the Xilinx Programmable Logic Device on it.To learn about the features of the Digilent Development Board and the Xilinx Programmable Logic Device on it. Development Board. Programmable Device Xilinx Spartan 3 FPGA. Digilent Nexys Xilinx Spartan 3E FPGA Digilent Nexys-2

3. Xilinx Spartan 3E FPGA 10476 equivalent logic cells (Overkill for us!!) Nexys-2 Development Board Digital Logic Resources

4. Xilinx Spartan 3 FPGA 4320 equivalent logic cells (Plenty big!!) Nexys Development Board Digital Logic Resources

5. Power Switch Power Configuration Jumpers (USB) Nexys-2 Development Board Power Sources / Configurations

6. Power Switch Power Configuration Jumpers Nexys Development Board For USB Power Sources / Configurations

7. JTAG Port USB Port Nexys-2 Development Board Programming Ports Program Mode Select Jumpers (JTAG)

8. JTAG Port USB Port Nexys Development Board Programming Ports

9. Clock Frequency Jumper 25/ 50/ 100 MHz 100MHz 25MHz Nexys Development Board Clock Signal Generator

10. 8 Slide Switches 4 Pushbuttons INPUTS UP = 1 - high DOWN = 0 - low Buttons = 1 (high) when pressed Nexys / Nexys-2 Development Boards

11. OUTPUTS 8 LEDs Four 7-segment LED Displays Nexys / Nexys-2 Development Boards

12. 5 Expansion Connectors Nexys Development Board External Circuit Expansion (4 on Nexys-2)

13. 5 Expansion Connectors Xilinx Spartan 3 CPLD (FPGA) 8 LEDs Four 7-segment LED Displays 8 Slide Switches 4 Pushbuttons Power Jack Power Switch JTAG Programming Port Nexys Development Board

14. Nexys-2 Block Diagram

15. Nexys Block Diagram

16. http://www.xilinx.com/webpack/classics/wpclassic/index.htm Available FREE Tools Xilinx ISE Webpack (V9.1i) Modelsim MXE-III Simulator (Requires registration with Xilinx) (Requires License File (via email)

17. Digilent Digilent Adept Suite (for programming Nexys Boards Nexys Boards via USB) via USB) Available FREE Tools http://www.digilentinc.com/Products/Detail.cfm?NavTop=2&NavSub=69&Prod=ADEPT

18. Available FREE Tools Xilinx ISE Webpack Modelsim MXE-III Simulator http://www.xilinx.com/ise/logic_design_prod/webpack.htm

19. Available FREE Tools Xilinx ISE Webpack Modelsim MXE-III Simulator http://www.xilinx.com/webpack/ (after registering with Xilinx)

20. The Lab Report should include the following: Experiment Title, Date, Lab Partners Names A brief statement of the purpose of the experiment A brief description of each experiment section Section title Brief procedures (in your own words) Description of circuits designed/tested during the experiment. Titled with a descriptive name for the circuit Brief verbal description of the circuit's function / purpose Circuit schematic and/or block diagram as appropriate Well-documented VHDL source code (later)

21. The Lab Report should include the following: Description of testing procedures and Results Tables of results (with Titles and column headings) Annotated simulation results (later with VHDL) Other items specifically requested in the Experiment procedures. (Be sure to include everything asked for!!) Answers to all questions asked in the body of the experiment A conclusion written by each group member Both conclusions in the single report.

22. Conclusions Good Stuff A brief description of what was accomplished in the experiment (1-3 sentences). Identify the key learnings or most helpful parts for you personally. What are you able to “do” or “understand” better, as a result of the lab exercise? A brief description of how the experiment relates to other experiments and/or topics discussed in CPE 129 course lecture.

23. Conclusions: Bad Stuff Detailed descriptions of the procedure followed during the experiment. Detailed descriptions of the circuits designed or used during the experiment. Comments regarding whether you liked the experiment or not. Comments regarding how much you learned during the experiment. (“I learned a lot in this lab. …”) Comments that state directly that the experiment’s objectives were met. Not again please…Once is enough! Not again please…Once is still enough! We hope you do! But it doesn’t belong in your Conclusions. We’re assuming that you will. “ZZZZZ”