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Figure 5–1 An example of AND-OR logic. Open file F05-01 to verify the operation. Thomas L. Floyd Digital Fundamentals, 9e Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
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Figure 5–2 Thomas L. Floyd Digital Fundamentals, 9e Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
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Figure 5–3 An AND-OR-Invert circuit produces a POS output. Open file F05-03 to verify the operation. Thomas L. Floyd Digital Fundamentals, 9e Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
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Figure 5–4 Thomas L. Floyd Digital Fundamentals, 9e Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
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Figure 5–5 Exclusive-OR logic diagram and symbols. Open file F05-05 to verify the operation. Thomas L. Floyd Digital Fundamentals, 9e Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
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Figure 5–6 Two equivalent ways of implementing the exclusive-NOR. Open file F05-06 to verify the operation. Thomas L. Floyd Digital Fundamentals, 9e Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
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Figure 5–7 Logic circuit for X = AB + CDE. Thomas L. Floyd Digital Fundamentals, 9e Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
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Figure 5–8 Logic circuits for Thomas L. Floyd Digital Fundamentals, 9e Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
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Figure 5–9 Logic circuit for. Open file F05-09 to verify the operation. Thomas L. Floyd Digital Fundamentals, 9e Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
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Figure 5–10 Open file F05-10 to verify the operation. Thomas L. Floyd Digital Fundamentals, 9e Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
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Figure 5–11 Open file F05-11 to verify the operation. Thomas L. Floyd Digital Fundamentals, 9e Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
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Figure 5–12 Open file F05-12 to verify that this circuit is equivalent to the circuit in Figure 5–13. Thomas L. Floyd Digital Fundamentals, 9e Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
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Figure 5–13 Thomas L. Floyd Digital Fundamentals, 9e Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
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Figure 5–14 Thomas L. Floyd Digital Fundamentals, 9e Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
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Figure 5–15 Thomas L. Floyd Digital Fundamentals, 9e Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
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Figure 5–16 Universal application of NAND gates. Open files F05-16(a), (b), (c), and (d) to verify each of the equivalencies. Thomas L. Floyd Digital Fundamentals, 9e Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
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Figure 5–17 Universal application of NOR gates. Open files F05-17(a), (b), (c), and (d) to verify each of the equivalencies. Thomas L. Floyd Digital Fundamentals, 9e Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
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Figure 5–18 NAND logic for X = AB + CD. Thomas L. Floyd Digital Fundamentals, 9e Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
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Figure 5–19 Development of the AND-OR equivalent of the circuit in Figure 5–18. Thomas L. Floyd Digital Fundamentals, 9e Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
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Figure 5–20 Illustration of the use of the appropriate dual symbols in a NAND logic diagram. Thomas L. Floyd Digital Fundamentals, 9e Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
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Figure 5–21 Thomas L. Floyd Digital Fundamentals, 9e Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
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Figure 5–22 Thomas L. Floyd Digital Fundamentals, 9e Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
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Figure 5–23 Thomas L. Floyd Digital Fundamentals, 9e Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
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Figure 5–24 NOR logic for X = (A + B)(C + D). Thomas L. Floyd Digital Fundamentals, 9e Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
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Figure 5–25 Thomas L. Floyd Digital Fundamentals, 9e Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
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Figure 5–26 Illustration of the use of the appropriate dual symbols in a NOR logic diagram. Thomas L. Floyd Digital Fundamentals, 9e Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
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Figure 5–27 Thomas L. Floyd Digital Fundamentals, 9e Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
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Figure 5–28 Thomas L. Floyd Digital Fundamentals, 9e Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
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Figure 5–29 Thomas L. Floyd Digital Fundamentals, 9e Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
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Figure 5–30 Thomas L. Floyd Digital Fundamentals, 9e Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
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Figure 5–31 Thomas L. Floyd Digital Fundamentals, 9e Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
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Figure 5–32 Thomas L. Floyd Digital Fundamentals, 9e Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
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Figure 5–33 Thomas L. Floyd Digital Fundamentals, 9e Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
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Figure 5–34 Thomas L. Floyd Digital Fundamentals, 9e Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
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Figure 5–35 Simplified comparison of the VHDL structural approach to a hardware implementation. The VHDL signals correspond to the interconnections on the circuit board, and the VHDL components correspond to the IC devices. Thomas L. Floyd Digital Fundamentals, 9e Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
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Figure 5–36 Predefined programs for a 2-input AND gate and a 2-input OR gate to be used as components in the data flow approach. Thomas L. Floyd Digital Fundamentals, 9e Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
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Figure 5–37 Thomas L. Floyd Digital Fundamentals, 9e Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
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Figure 5–38 Illustration of the instantiation statements and port mapping applied to the AND-OR logic. Signals are shown in red. Thomas L. Floyd Digital Fundamentals, 9e Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
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Figure 5–39 Thomas L. Floyd Digital Fundamentals, 9e Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
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Figure 5–40 A VHDL program for a combinational logic circuit after entry on a generic text editor screen that is part of a software development tool. Thomas L. Floyd Digital Fundamentals, 9e Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
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Figure 5–41 A typical waveform editor tool showing the simulated waveforms for the logic circuit described by the VHDL code in Figure 5–40. Thomas L. Floyd Digital Fundamentals, 9e Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
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Figure 5–42 Illustration of a node in a logic circuit. Thomas L. Floyd Digital Fundamentals, 9e Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
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Figure 5–43 Open output in driving gate. For simplicity, assume a HIGH is on one gate input. Thomas L. Floyd Digital Fundamentals, 9e Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
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Figure 5–44 Open input in a load gate. Thomas L. Floyd Digital Fundamentals, 9e Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
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Figure 5–45 Shorted output in the driving gate or shorted input in a load gate. Thomas L. Floyd Digital Fundamentals, 9e Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
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Figure 5–46 Example of signal tracing and waveform analysis in a portion of a printed circuit board. TP indicates test point. Thomas L. Floyd Digital Fundamentals, 9e Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
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Figure 5–47 Thomas L. Floyd Digital Fundamentals, 9e Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
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Figure 5–48 Fluid storage tank with level and temperature sensors and controls. Thomas L. Floyd Digital Fundamentals, 9e Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
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Figure 5–49 Karnaugh map simplification and implementation for the inlet valve logic. Thomas L. Floyd Digital Fundamentals, 9e Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
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Figure 5–50 Karnaugh map simplification and implementation for the outlet valve logic. Thomas L. Floyd Digital Fundamentals, 9e Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
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Figure 5–51 Thomas L. Floyd Digital Fundamentals, 9e Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
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Figure 5–52 Thomas L. Floyd Digital Fundamentals, 9e Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
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Figure 5–53 Thomas L. Floyd Digital Fundamentals, 9e Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
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Figure 5–54 Thomas L. Floyd Digital Fundamentals, 9e Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
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Figure 5–55 Thomas L. Floyd Digital Fundamentals, 9e Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
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Figure 5–56 Thomas L. Floyd Digital Fundamentals, 9e Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
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Figure 5–57 Thomas L. Floyd Digital Fundamentals, 9e Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
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Figure 5–58 Thomas L. Floyd Digital Fundamentals, 9e Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
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Figure 5–59 Thomas L. Floyd Digital Fundamentals, 9e Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
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Figure 5–60 Thomas L. Floyd Digital Fundamentals, 9e Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
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Figure 5–61 Thomas L. Floyd Digital Fundamentals, 9e Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
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Figure 5–62 Thomas L. Floyd Digital Fundamentals, 9e Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
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Figure 5–63 Thomas L. Floyd Digital Fundamentals, 9e Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
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Figure 5–64 Thomas L. Floyd Digital Fundamentals, 9e Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
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Figure 5–65 Thomas L. Floyd Digital Fundamentals, 9e Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
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Figure 5–66 Thomas L. Floyd Digital Fundamentals, 9e Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
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Figure 5–67 Thomas L. Floyd Digital Fundamentals, 9e Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
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Figure 5–68 Thomas L. Floyd Digital Fundamentals, 9e Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
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Figure 5–69 Thomas L. Floyd Digital Fundamentals, 9e Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
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Figure 5–70 Thomas L. Floyd Digital Fundamentals, 9e Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
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Figure 5–71 Thomas L. Floyd Digital Fundamentals, 9e Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
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Figure 5–72 Thomas L. Floyd Digital Fundamentals, 9e Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
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Figure 5–73 Thomas L. Floyd Digital Fundamentals, 9e Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
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Figure 5–74 Thomas L. Floyd Digital Fundamentals, 9e Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
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Figure 5–75 Thomas L. Floyd Digital Fundamentals, 9e Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
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Figure 5–76 Thomas L. Floyd Digital Fundamentals, 9e Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.
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