1. EKT 441 MICROWAVE COMMUNICATIONS
CHAPTER 6:
MICROWAVE AMPLIFIERS

2. INTRODUCTION
Most RF and microwave amplifiers today used transistor devices such as Si or SiGe BJTs, GaAs HBTs, GaAs or InP FETs, or GaAs HEMTs.
Microwave transistor amplifiers are rugged, low cost, reliable and can be easily integrated in both hybrid an monolithic integrated circuitry.

3. General Amplifier Block Diagram
DC supply
vs(t)
vo(t) ZL Vs Zs
Amplifier
Input
Matching
Network
Output
vi(t)
ii(t)
io(t) PL
Pin
Vcc
The active
component
Input and output voltage relation of the amplifier
can be modeled simply as:

4. Amplifier Classification
Amplifier can be categorized in 2 manners.
According to signal level:
Small-signal Amplifier.
Power/Large-signal Amplifier.
According to D.C. biasing scheme of the active component:
Class A.
Class B.
Class AB.
Class C.
Our approach in this chapter
There are also other classes, such as Class D (D stands for
digital), Class E and Class F. These all uses the transistor/FET as
a switch.

5. Small-Signal Versus Large-Signal Operation
Usually non-sinusoidal waveform
Large-signal:
Nonlinear
Small-signal:
Linear
Sinusoidal waveform Zs
vi(t) Vs
vo(t) ZL

6. Small-Signal Amplifier (SSA)
All amplifiers are inherently nonlinear.
However when the input signal is small, the input and output relationship of the amplifier is approximately linear.
This linear relationship applies also to current and power.
An amplifier that fulfills these conditions: (1) small-signal operation (2) linear, is called Small-Signal Amplifier (SSA). SSA will be our focus.
If a SSA amplifier contains BJT and FET, these components can be replaced by their respective small-signal model, for instance the hybrid-Pi model for BJT.
Linear relation
When vi(t)0 (< 2.6mV)
(1.1)

7. Example 1.1 - An RF Amplifier Schematic (1)
DC supply ZL Vs Zs
Amplifier
Input
Matching
Network
Output
RF power flow

8. Typical RF Amplifier Characteristics
To determine the performance of an amplifier, the following characteristics are typically observed.
1. Power Gain.
2. Bandwidth (operating frequency range).
3. Noise Figure.
4. Phase response.
5. Gain compression.
6. Dynamic range.
7. Harmonic distortion.
8. Intermodulation distortion.
9. Third order intercept point (TOI).
Important to small-signal
amplifier
Important parameters of
large-signal amplifier
(Related to Linearity)

9. Power Gain
For amplifiers functioning at RF and microwave frequencies, usually of interest is the input and output power relation.
The ratio of output power over input power is called the Power Gain (G), usually expressed in dB.
There are a number of definition for power gain as we will see shortly.
Furthermore G is a function of frequency and the input signal level.
Power Gain
(1.2)

10. Why Power Gain for RF and Microwave Circuits? (1)
Power gain is preferred for high frequency amplifiers as the impedance encountered is usually low (due to presence of parasitic capacitance).
For instance if the amplifier is required to drive 50Ω load the voltage across the load may be small, although the corresponding current may be large (there is current gain).
For amplifiers functioning at lower frequency (such as IF frequency), it is the voltage gain that is of interest, since impedance encountered is usually higher (less parasitic).
For instance if the output of IF amplifier drives the demodulator circuits, which are usually digital systems, the impedance looking into the digital system is high and large voltage can developed across it. Thus working with voltage gain is more convenient.
Power = Voltage x Current

11. Why Power Gain for RF and Microwave Circuits? (2)
Instead on focusing on voltage or current gain, RF engineers focus on power gain.
By working with power gain, the RF designer is free from the constraint of system impedance. For instance in the simple receiver block diagram below, each block contribute some power gain. A large voltage signal can be obtained from the output of the final block by attaching a high impedance load to it’s output.
400Ω t
v(t)
4.90 V
IF signal
power
75 W LO
IF Amp.
BPF
LNA
RF Portion
(900 MHz)
IF Portion
(45 MHz)
7.5 mW
RF signal
power
1 W
15 W

12. Harmonic Distortion (1)
When the input driving signal is
small, the amplifier is linear.
Harmonic components are
almost non-existent. Zs f f1
2f1
3f1
4f1
harmonics f1 Vs ZL f
Pout
Pin
Harmonics generation reduces the gain
of the amplifier, as some of the output
power at the fundamental frequency is
shifted to higher harmonics. This result in gain compression seen earlier!
Small-signal
operation
region

13. Harmonic Distortion (2)
When the input driving signal is
too large, the amplifier becomes
nonlinear. Harmonics are
introduced at the output. Zs f
harmonics f1
2f1
3f1
4f1 f f1 Vs ZL
Pout
Pin
Harmonics generation reduces the gain
of the amplifier, as some of the output
power at the fundamental frequency is
shifted to higher harmonics. This result in gain compression seen earlier!

14. Power Gain, Dynamic Range and Gain Compression
Noise Floor
-70
-60
-50
-40
-30
-20
-10 10
Pin
(dBm) 20
Pout 30
Power gain Gp = Pout(dBm) - Pin(dBm)
= -30-(-43) = 13dB
Pin
Pout
Input and output at same frequency
Ideal amplifier
1dB
Gain compression
occurs here
Saturation
Device
Burn
out
Dynamic range (DR)
1dB compression
Point (Pin_1dB)
Linear Region
Nonlinear
Region

15. Bandwidth Power gain G versus frequency for small-signal amplifier.
Po dBm
Pi dBm
Po dBm
Pi dBm
f / Hz
G/dB
3 dB
Bandwidth

16. Intermodulation Distortion (IMD)
ignored f f1 f2
|Vi|
Operating bandwidth
of the amplifier f
f1-f2
2f1-f2
2f2-f1 f2 f1
2f1
f1+f2
2f2
3f1
3f2
2f1+f2
2f2+f1
|Vo|
IMD
Usually specified in dB
Two signals v1, v2 with similar
amplitude, frequencies f1 and f2
near each other
These are unwanted components, caused by
the term 3vi3(t), which falls in the operating
bandwidth of the amplifier.

17. Noise Figure (F)
Smaller SNRin
The amplifier also introduces noise into the output in
addition to the noise from the environment.
Assuming small-signal operation.
Larger SNRout Zs
Noise Figure (F)= SNRin/SNRout
Since SNRin is always larger than SNRout, F > 1 for an amplifier which contribute noise. Vs ZL
SNR:
Signal to Noise
Ratio

18. Power Components in an AmplifierZL Vs Zs
Amplifier
Approximate
Linear circuit
2 basic source-
load networks Vs Zs ZL Z1 Z2
VAmp + -
PAo PL
PRo
PAs
PRs
Pin

19. Power Gain Definition (2.1a) (2.1b) (2.1c)
From the power components, 3 types of power gain can be defined.
GP, GA and GT can be expressed as the S-parameters of the amplifier and the reflection coefficients of the source and load networks. Refer to Appendix 1 for the derivation.
(2.1a)
(2.1b)
(2.1c)
The effective power gain

20. Naming Convention 2 - port Network 1 2 s L In the spirit of high-
frequency circuit design,
where frequency response
of amplifier is characterized
by S-parameters and
reflection coefficient is
used extensively
instead of impedance,
power gain can be expressed
in terms of these parameters. ZL Vs Zs
Amplifier
2 - port
Network 1 2
Source
Load s L

21. TWO-PORT POWER GAIN
Figure 7.1: A two port network with general source and load impedance.

22. Power Gain Definition (2.1a) (2.1b) (2.1c)
From the power components, 3 types of power gain can be defined.
GP, GA and GT can be expressed as the S-parameters of the amplifier and the reflection coefficients of the source and load networks. Refer to Appendix 1 for the derivation.
(2.1a)
(2.1b)
(2.1c)
The effective power gain

23. TWO-PORT POWER GAIN
Power Gain = G = PL / Pin is the ratio of power dissipated in the load ZL to the power delivered to the input of the two-port network. This gain is independent of Zs although some active circuits are strongly dependent on ZS.
Available Gain = GA = Pavn / Pavs is the ratio of the power available from the two-port network to the power available from the source. This assumes conjugate matching in both the source and the load, and depends on ZS but not ZL.
Transducer Power Gain = GT = PL / Pavs is the ratio of the power delivered to the load to the power available from the source. This depends on both ZS and ZL.
If the input and output are both conjugately matched to the two-port, then the gain is maximized and G = GA = GT

24. TWO-PORT POWER GAIN From the definition of S parameters: [7.1a] [7.1b]
Eliminating V2- from [7.1a]:
[7.2]
[7.3]

25. TWO-PORT POWER GAIN By voltage division: [7.4] Using: [7.5]
Solving for V1+:
[7.6]

26. TWO-PORT POWER GAIN The average power delivered to the network: [7.7]
The power delivered to the load is:
[7.8]
[7.9]

27. TWO-PORT POWER GAIN The power gain can be expressed as: [7.10]
The available power from the source:
[7.11]
The available power from the network:
[7.12]

28. TWO-PORT POWER GAIN The power available from the network: [7.13]
The available power gain:
[7.14]
The transducer power gain:
[7.15]

29. Summary of Important Power Gain Expressions and the Gain Dependency Diagram
(2.2b)
(2.2e) s L 1 2 GA GP GT
Note:
All GT, GP, GA, 1 and 2
depends on the S-
parameters.
The Gain Dependency Diagram

30. TWO-PORT POWER GAIN
A special case of the transducer power gain occurs when both input and output are matched for zero reflection (in contrast to conjugate matching).
[7.16]
Another special case is the unilateral transducer power gain, GTU where S12=0 (or is negligibly small). This nonreciprocal characteristic is common to many practical amplifier circuits. Γin = S11 when S12 = 0, so the unilateral transducer gain is:
[7.17]

31. TWO-PORT POWER GAIN
Figure 7.2: The general transistor amplifier circuit.

32. TWO-PORT POWER GAIN The separate effective gain factors: [7.18a]
[7.18b]
[7.18c]

33. TWO-PORT POWER GAIN
If the transistor is unilateral, the unilateral transducer gain reduces to GTU = GSG0GL , where:
[7.19a]
[7.19b]
[7.19c]

34. Example 1 – Familiarization with the Gain Expressions
An RF amplifier has the following S-parameters at fo: s11=0.3<-70o, s21=3.5<85o, s12=0.2<-10o, s22=0.4<-45o. The system is shown below. Assuming reference impedance (used for measuring the S-parameters) Zo=50, find:
(a) GT, GA, GP.
(b) PL, PA, Pinc.
Amplifier
ZL=73
40
5<0o

35. Example 1 Cont... Step 1 - Find  s and L . Step 2 - Find 1 and 2 .
Step 3 - Find GT, GA, GP.
Step 4 - Find PL, PA.
Try to derive
These 2 relations
Again note that this is an
analysis problem.

36. STABILITY
In the circuit of Figure 7.2, oscillation is possible if either the input or output port impedance has the negative real part; this would imply that |Γin|>1 or |Γout|>1.
Γin and Γout depends on the source and load matching networks, the stability of the amplifier depends on ΓS and ΓL as presented by matching networks.
Unconditionally stable: The network is unconditionally stable if |Γin| < 1 and |Γout| < 1 for all passive source and load impedance (ex; |ΓS| < 1 and |Γ| < 1).
Conditionally stable: The network is conditionally stable if |Γin| < 1 and |Γout| < 1 only for a certain range of passive source and load impedance. This case also referred as potentially unstable.
The stability condition of an amplifier circuit is usually frequency dependent.

37. STABILITY CIRCLES
The condition that must be satisfied by ΓS and ΓL if the amplifier is to be unconditionally stable:
[7.20a]
[7.20b]
The determinant of the scattering matrix:
[7.21]

38. STABILITY CIRCLES The output stability circles:
The input stability circles:
[7.23a]
[7.23b]

39. STABILITY CIRCLES
Figure 7.3: Output stability circles for conditionally stable device.
(a) |S11| < 1 (b) |S11| > 1

40. STABILITY CIRCLES
If the device is unconditionally stable, the stability circles must be completely outside (or totally enclose) the Smith chart.
[7.24a]
[7.24b]

41. STABILITY TEST Rollet’s condition: the auxiliary condition:
[7.25]
the auxiliary condition:
[7.26]
the μ test:
[7.27]

42. Example 2
The S parameters for the HP HFET-102 GaAs FET at 2 GHz with a bias voltage of Vgs = 0 are given as follow (Z0 = 50 Ohm):
S11 = < -60.6
S21 = < 123.6
S12 = < 62.4
S22 = < -27.6
Determine the stability of this transistor using the K- test and the μ test, and plot the stability circles on the Smith Chart

43. Example 2 Remember, criteria for unconditional stability is:
For the K- test:
For the μ test:

44. Example 2 Calculation results: For the K- test: For the μ test:
Which indicates potential instability

45. Example 2 Calculation for the input and output stability circles:
Output stability circle center and radius:
Input stability circle and radius

46. Figure 7.4: Example of stability circles

47. SINGLE STAGE TRANSISTOR AMPLIFIER DESIGN
Maximum power transfer from the input matching network to the transistor and the maximum power transfer from the transistor to the output matching network will occur when:
[7.28a]
[7.28b]
Then, assuming lossless matching sections, these conditions will maximize the overall transducer gain:
[7.29]

48. SINGLE STAGE TRANSISTOR AMPLIFIER DESIGN
In the general case with a bilateral transistor, Γin is affected by Γout, and vice versa, so that the input and output sections must be matched simultaneously.
[7.30a]
[7.30b]

49. SINGLE STAGE TRANSISTOR AMPLIFIER DESIGN
The solution is:
[7.31a]
[7.31b]

50. SINGLE STAGE TRANSISTOR AMPLIFIER DESIGN
The variables are defined as:
[7.32a]
[7.32b]
[7.32c]
[7.32d]

51. SINGLE STAGE TRANSISTOR AMPLIFIER DESIGN
When S12 = 0, it shows that ΓS = S11* and ΓL = S22*, and the maximum transducer gain for unilateral case:
[7.33]
When the transistor is unconditionally stable, K > 1, and the max transducer power gain can be simply re-written as:
[7.34]
The maximum stable gain with K = 1:
[7.35]

52. Example 3
Design an amplifier for a maximum gain at 4.0 GHz. Calculate the overall transducer gain, G, and the maximum overall transducer gain GTMAX. The S parameters for the GaAs FET at 4 GHz given as follow (Z0 = 50 Ohm):
S11 = 0.72 < -116
S21 = 2.60 < 76
S12 = 0.03 < 57
S22 = 0.73 < -68

53. Example 3 (Cont)
Determine the stability of this transistor using the K- test
Since || < 1 and K > 1, the transistor is unconditionally stable at 4.0 GHz.

54. Example 3 (cont)
For the maximum gain, we should design the matching sections for a conjugate match to the transistor. Thus, ΓS = Γin* and ΓL = Γout*, ΓS and ΓL can be determined from;

55. Example 3 The effective gain factors can calculated as:
So the overall maximum transducer gain will be;

56. UNILATERAL FOM
In many practical cases |S12| is small enough to be ignored, the device then can be assumed to be unilateral, which greatly simplifies design procedure
Error in the transducer gain caused by approximating |S12| as zero is given by the ratio GT/GTU, and be bounded by:
Where U is defined as the unilateral figure of merit

57. Example 4
An FET is biased for minimum noise figure, and has the following S parameters at 4 GHz:
S11 = 0.60 < -60
S21 = 1.90 < 81
S12 = 0.05 < 26
S22 = 0.50 < -60
For design purposes, assume the device is unilateral and calculate the max error in GT resulting from this assumption.

58. Example 4 (cont) To compute the unilateral figure of merit;
Then the ratio of GT/GTU is bounded as;

59. Example 4 (cont) In dB, this is;
Where GT and GTU are now in dB. Thus we should expect less than about ± 0.5 dB error in gain.

60. CONSTANT GAIN CIRCLES
In many cases it is desirable to design for less than the max obtainable gain, to improve bandwidth or to obtain a specific value for an amplifier gain.
Mismatches are purposely introduced to reduce the overall gain
Procedure is facilitated by plotting constant gain circles on the Smith Chart
Represents loci of ΓS and ΓL, that give fixed values of GS and GL.
To simplify the discussion, we will only treat the case of a unilateral device

61. CONSTANT GAIN CIRCLES
The expression for the GS and GL for the unilateral case is given by:
These gains are maximized when ΓS = S11* and ΓL = S22* :

62. CONSTANT GAIN CIRCLES
Now we define normalized gain factors gS and gL as;
Thus we have a that: 0 ≤ gS ≤ 1, and 0 ≤ gL ≤ 1. A fixed value of gS and gL represents circles in the ΓS and ΓL planes.

63. CONSTANT GAIN CIRCLES Input constant gain circles:
[7.37b]
Output constant gain circles:
[7.38a]
[7.38b]

64. Example 5
Design an amplifier to have a gain of 11 dB at 4 GHz. Plot constant gain circles for GS = 2 dB and 3 dB; and GL = 0 dB and 1 dB. The FET has the following S parameters (Z0 = 50 Ω):
S11 = 0.75 < -120
S21 = 2.50 < 80
S12 = 0.00 < 0
S22 = 0.60 < -85

65. Example 5 (cont)
Since S12 = 0 and |S11| < 1 and |S22| < 1, the transistor is unilateral and unconditionally stable. We calculate the max matching section gains as;
The gain of the mismatched transistor is;

66. Example 5 (cont) So the max unilateral transducer gain is
Thus we have 2.5 dB more available gain than required by specs, since the design only requires 11 dB gain. However, the question also asked us to analyze the effect of having:
Condition 1: GS = 3 dB and GL = 0 dB
Condition 2: GS = 2 dB and GL = 1 dB
(Note that these conditions must happens at the same time in order to keep the gain at 11 dB.)

67. Example 5 (cont)
For condition 1 (input side), when GS = 3 dB:

68. Example 5 (cont)
For condition 1 (output side), when GL = 0 dB:

69. Example 5 (cont)

70. LOW NOISE AMPLIFIER DESIGN
In receiver applications especially, it is often required to have a preamplifier with as low a noise figure as possible since, the first stage of a receiver front end has the dominant effect on the noise performance of the overall system.
Generally it is not possible to obtain both minimum noise figure and maximum gain for an amplifier, so some sort of compromise must be made. This can be done by using constant gain circles and circles of constant noise figure to select a usable trade of between noise figure and gain.
[7.39]

71. LOW NOISE AMPLIFIER DESIGN
For a fixed noise figure, F, the noise figure parameter, N, is given as:
[7.40]
The circles of constant noise figure:
[7.41a]
[7.41b]

72. Example 6
An GaAs FET amplifier is biased for minimum noise figure and has the following S-parameters (Z0 = 50 Ω):
S11 = 0.75 < -120
S21 = 2.50 < 80
S12 = 0.00 < 0
S22 = 0.60 < -85
Γopt = 0.62 < 100
Fmin = 1.6 dB
RN = 20 Ω
For design purposes, assume the unilateral. Then design an amplifier having 2.0 dB noise figure with the max gain that is compatible with this noise figure.

73. Example 6 (cont)
Next use the formulas to compute the center and radius of the 2 dB noise figure circle:
The gain of the mismatched transistor is

74. Example 6 (cont)
The noise figure circle is plotted in the figure. Min noise figure (Fmin = 1.6 dB) occurs for ΓS = Γopt = 0.62<100o
GS (dB) gS CS RS
1.0
0.805
0.52<60o
0.300
1.5
0.904
0.56<60o
0.205
1.7
0.946
0.58<60o
0.150
It can be seen that GS = 1.7 dB gain circle just intersects the F = 2.0 dB noise figure circle, and any higher gain will result in a worse noise figure.

75. Example 6 (cont)
For the output section we choose ΓL = S22* = 0.5<60o for a max GL of:

76. Example 6 (cont)