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David MacNair POWER SUPPLY 3/30/20061 Ethernet Power Supply Controller.

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Presentation on theme: "David MacNair POWER SUPPLY 3/30/20061 Ethernet Power Supply Controller."— Presentation transcript:

1 David MacNair POWER SUPPLY CONTROLLERmacnair@slac.stanford.edu 3/30/20061 Ethernet Power Supply Controller

2 David MacNair POWER SUPPLY CONTROLLERmacnair@slac.stanford.edu 3/30/20062 Ethernet Power Supply Controller (EPSC) The EPSC was intended as a replacement for the PEP 2 Bitbus Power Supply Control chassis The intent was to provide as much commonality as possible with the Bitbus controller The performance was to be equal or better then the Bitbus chassis Should not cost more then Bitbus controller

3 David MacNair POWER SUPPLY CONTROLLERmacnair@slac.stanford.edu 3/30/20063 The main components to be changed The DAC used in the Bitbus chassis is obsolete and a new DAC was required. The Bitbus network is obsolete and it is desirable to convert to Ethernet (10/100 Mb/sec over UTP) The FPGAs are at end of life and are not good choices for new designs The 8044 processor is obsolete Use standard +/-15VDC power supply

4 David MacNair POWER SUPPLY CONTROLLERmacnair@slac.stanford.edu 3/30/20064 The main features to preserve Size of controller (1U in 19 inch rack) Power Supply, Transductor, and Interlock connector types and interfaces Use Bitbus Daughter Boards Support Bitbus command set Use existing Bitbus local control board Support for redundant transductor All interlocks handled by FPGA, not software Ability to reset processor without turning off power supply

5 David MacNair POWER SUPPLY CONTROLLERmacnair@slac.stanford.edu 3/30/20065 Desirable improvements Improved speed and resolution of ADC Internal Fan to allow true 1U stacking Air Filter and closed chassis to minimize dirt Provide option of analog or digital regulation Magnet Interlock circuit to locate faulted klixons in magnet strings Extended analog readbacks

6 David MacNair POWER SUPPLY CONTROLLERmacnair@slac.stanford.edu 3/30/20066 Power supply controller functions Precision current regulation (using PS as voltage source) Setting and ramping of currents Readback of current, voltage, and ground current Ground fault protection Hardware magnet and power supply protection (no software) Fault latching and reporting Simple low cost serial communication to central control

7 David MacNair POWER SUPPLY CONTROLLERmacnair@slac.stanford.edu 3/30/20067 Interface to Standard Components Power Supplies of many ratings, types and from different vendors Board range of current transducers (transductors) Standard cables (Cat 5 UTP and D-sub computer cables)

8 David MacNair POWER SUPPLY CONTROLLERmacnair@slac.stanford.edu 3/30/20068

9 David MacNair POWER SUPPLY CONTROLLERmacnair@slac.stanford.edu 3/30/20069

10 David MacNair POWER SUPPLY CONTROLLERmacnair@slac.stanford.edu 3/30/200610

11 David MacNair POWER SUPPLY CONTROLLERmacnair@slac.stanford.edu 3/30/200611 Current Input Daughter BoardVoltage Input Daughter Board > 600 amp Transductors150, 300, and 600 amp Danfysik Transductors

12 David MacNair POWER SUPPLY CONTROLLERmacnair@slac.stanford.edu 3/30/200612 Local Control Board Allows Local control of Power Supply Voltage or Current Regulation Analog Test Points Same as Bitbus Local Controller

13 David MacNair POWER SUPPLY CONTROLLERmacnair@slac.stanford.edu 3/30/200613 Processor board Uses 32 bit Motorola Coldfire processor 512K of flash program memory 8M of SDRAM memory Provides Ethernet interface and 3 UARTS C Libraries and Compiler Boot loader over Ethernet TCP/IP stack Real time operating system (uCOS)

14 David MacNair POWER SUPPLY CONTROLLERmacnair@slac.stanford.edu 3/30/200614 Netburner Mod5282

15 David MacNair POWER SUPPLY CONTROLLERmacnair@slac.stanford.edu 3/30/200615 Sigma Delta ADCs Two Burr Brown ADS1255 24 Bit Sigma-Delta ADC 6 PPM linearity (corrected to 2 PPM) Input amplifier provides +/- 12V range 20 bit effective resolutuion of 10V range at 60 samples/sec Gain set by oven stabilized zener (0.25 PPM/C) Gain and offset readings interleaved with data

16 David MacNair POWER SUPPLY CONTROLLERmacnair@slac.stanford.edu 3/30/200616 DAC (PWM) 8 bit PWM 32 MHZ clock 117 KHZ period (274 clocks) 9 clock minimum ON/OFF period 24 bit input latch Forth order digital filter Output regulated using ADC1

17 David MacNair POWER SUPPLY CONTROLLERmacnair@slac.stanford.edu 3/30/200617

18 David MacNair POWER SUPPLY CONTROLLERmacnair@slac.stanford.edu 3/30/200618

19 David MacNair POWER SUPPLY CONTROLLERmacnair@slac.stanford.edu 3/30/200619

20 David MacNair POWER SUPPLY CONTROLLERmacnair@slac.stanford.edu 3/30/200620 Analog and Digital Regulation 4 modes of operation Error Amplifier with DAC reference Error Amplifier with Local Control reference Direct PS control with Local Control Direct PS control with DAC, digital regulation using processor and ADC1

21 David MacNair POWER SUPPLY CONTROLLERmacnair@slac.stanford.edu 3/30/200621

22 David MacNair POWER SUPPLY CONTROLLERmacnair@slac.stanford.edu 3/30/200622 Klixon Fault Location Circuit Allows klixon fault location in strings of up to 40 klixons Two circuits per controller Three wire interface, no active components in radiation areas Controller senses current in interlock chain after a fault, converts to conductance to locate faulted klixon.

23 David MacNair POWER SUPPLY CONTROLLERmacnair@slac.stanford.edu 3/30/200623

24 David MacNair POWER SUPPLY CONTROLLERmacnair@slac.stanford.edu 3/30/200624 Fan Speed Control Fan voltage programmable from 5V to 13V Speed changes from 3000 to 9000 RPM Voltage at minimum below 90 ° F Voltage at maximum above 105 ° F Fan filter on front panel of controller Fan RPM calculated from current pulses Air ducted below PC board

25 David MacNair POWER SUPPLY CONTROLLERmacnair@slac.stanford.edu 3/30/200625 Chassis Airflow

26 David MacNair POWER SUPPLY CONTROLLERmacnair@slac.stanford.edu 3/30/200626 Current Status 2 Prototype units built 4 Pre-Production units built 40 Production Units under construction 30 units for SSRL 7 units for LCLS injection

27 David MacNair POWER SUPPLY CONTROLLERmacnair@slac.stanford.edu 3/30/200627 Comparison of Bitbus and EPSC Controller Performance BitbusEPSCUnitParameter 230/60ADC readings per second 123uV RMSADC noise (0.1 to 10 Hz) 1820BitsEffective number of bits (10V FS) 2124BitsDAC resolution *2uV RMSDAC noise (0.1 to 10 Hz) *2PPM maxDAC Linearity 0-10V 0.250.25PPM/°C maxADC temperature stability max 1.01.0PPM/°C typDaughter card temperature stability typ

28 David MacNair POWER SUPPLY CONTROLLERmacnair@slac.stanford.edu 3/30/200628

29 David MacNair POWER SUPPLY CONTROLLERmacnair@slac.stanford.edu 3/30/200629

30 David MacNair POWER SUPPLY CONTROLLERmacnair@slac.stanford.edu 3/30/200630

31 David MacNair POWER SUPPLY CONTROLLERmacnair@slac.stanford.edu 3/30/200631

32 David MacNair POWER SUPPLY CONTROLLERmacnair@slac.stanford.edu 3/30/200632

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