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ECE 301 – Digital Electronics Counters (Lecture #16)
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ECE 301 - Digital Electonics2 3-bit Counter: State Diagram 000 001 010 011 100 101 110 111
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ECE 301 - Digital Electonics3 Asynchronous Counters (aka. Ripple Counters) Counters
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ECE 301 - Digital Electonics4 4-bit (up) Counter Let each bit in the counter be represented by the output of a flip-flop. CountA3A3 A2A2 A1A1 A0A0 00000 10001 20010 30011 40100 50101 60110 70111 A3A3 A2A2 A1A1 A0A0 81000 91001 101010 111011 121100 131101 141110 151111 00000
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ECE 301 - Digital Electonics5 4-bit (up) Counter: T Flip-Flops Asynchronous Counter Counter does not use a common clock.
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ECE 301 - Digital Electonics6 4-bit (up) Counter: T Flip-Flops Clock A 0 A 1 A 2 A 3 Count012345678
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ECE 301 - Digital Electonics7 4-bit (up) Counter: D Flip-Flops Asynchronous Counter Counter does not use a common clock.
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ECE 301 - Digital Electonics8 Synchronous Counters Counters
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ECE 301 - Digital Electonics9 4-bit (up) Counter As before, let each bit in the counter be represented by the output of a flip-flop. CountQ3Q3 Q2Q2 Q1Q1 Q0Q0 00000 10001 20010 30011 40100 50101 60110 70111 Q3Q3 Q2Q2 Q1Q1 Q0Q0 81000 91001 101010 111011 121100 131101 141110 151111 00000
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ECE 301 - Digital Electonics10 4-bit (up) Counter: T Flip-Flops
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ECE 301 - Digital Electonics11 4-bit (up) Counter: JK Flip-Flops Synchronous Counter Counter uses a common clock.
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ECE 301 - Digital Electonics12 4-bit Counter: D Flip-Flops Clock Enable D Q Q D Q Q D Q Q D Q Q Q 0 Q 1 Q 2 Q 3 Output carry How does the XOR gate function when the Enable signal is a logic-1?
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ECE 301 - Digital Electonics13 Binary Counter with Parallel Load Synchronous Counters
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ECE 301 - Digital Electonics14 4-bit Counter with Parallel Load Is the Load signal active-high or active-low?
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ECE 301 - Digital Electonics15 4-bit Counter with Parallel Load
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ECE 301 - Digital Electonics16 Synchronous Counters Modulo-6 Counter
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ECE 301 - Digital Electonics17 Modulo-6 Counter: D Flip-Flops 01234501 Clock Count Q 0 Q 1 Q 2 Enable Q 0 Q 1 Q 2 D 0 D 1 D 2 Load Clock 1 0 0 0 3-bit counter with Parallel Load Counter resets to zero when count reaches six.
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ECE 301 - Digital Electonics18 Modulo-6 Counter: T Flip-Flops T Q Q Clock T Q Q T Q Q 1 Q 0 Q 1 Q 2 Q 0 Q 1 Q 2 Count012345012 asynchronous clear signal Counter cleared when count reaches six.
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ECE 301 - Digital Electonics19 BCD (Decimal) Counter (aka. Modulo-10 Counter) Counters
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ECE 301 - Digital Electonics20 BCD Counter: State Diagram
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ECE 301 - Digital Electonics21 BCD Counter: JK Flip-Flops Asynchronous Counter
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ECE 301 - Digital Electonics22 BCD Counter: D Flip-Flops Synchronous Counter
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ECE 301 - Digital Electonics23 Up / Down Counter Synchronous Counters
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ECE 301 - Digital Electonics24 4-bit Up / Down Counter
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ECE 301 - Digital Electonics25 Acknowledgments The slides used in this lecture were taken, with permission, from those provided by PUBLISHER for TEXT BOOK NAME (3 rd Edition). They are the property of and are copyrighted by PUBLISHER.
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