1. Lecture 1. Embedded Systems vs General-Purpose Systems
COM509 Computer Systems
Lecture 1. Embedded Systems vs General-Purpose Systems
Prof. Taeweon Suh
Computer Science Education
Korea University

2. Embedded Systems
Embedded System is a special-purpose computer system designed to perform one or a few dedicated functions -- Wikipedia
In general, it does not provide programmability to users, as opposed to general purpose computer systems like PC
Embedded systems are virtually everywhere in your daily life

3. iPhone Generations Original iPhone (iPhone 2G) June 2007 iPhone 3G
iPhone 3GS
June 2009
iPhone 4
June 2010
iPhone 5
Sep. 2012
Oct. 2011
iPhone 4S
iPhone 5s
iPhone 5c
Sep. 2013

4. Galaxy S Series Galaxy S June 2010 Galaxy S2 May 2011 Galaxy S3
Android 2.3.6
Single-core Cortex A8
June 2010
Galaxy S2
Android 2.3 Gingerbread
Dual-core Cortex A9
May 2011
Galaxy S3
Android Ice Cream Sandwich
Dual-core Cortex A9
May 2012
Galaxy S4
Android Jelly Bean
(Quad-core Cortex A15 & Quad-core Cortex-A7) or Quad-core Krait (Qualcomm Snapdragon)
April 2013
Galaxy S5

5. Smartphone War

6. Embedded Systems (Cont)
Even though embedded systems cover a wide range of special-purpose systems, there are common characteristics
Low cost
Should be cheap to be competitive
Memory is typically very small compared to a general purpose computer system
Lightweight processors are used in embedded systems
Low power
Should consume low power especially in case of portable devices
Low-power processors are used in embedded systems

7. Embedded Systems (Cont)
High performance
Should meet the computing requirements of applications
Users want to watch video on portable devices
Audio should be in sync with video
Gaming gadgets like playstation should provide high performance
Real-time property
Job should be done within a time limit
Aerospace applications, Car control systems, Medical gadgets are critical in terms of time constraint – Otherwise, it could lead to catastrophe such as loss of life
Will talk more about this

8. Embedded Systems (Cont)
It is challenging to satisfy the characteristics
You may not be able to achieve high performance while utilizing cheap components and maintaining low power consumption
So, you got to do your best in a given circumstance to be competitive in the market

9. HW/SW Stack of Embedded Systems
Identical to the general computer systems
Application Software
OS / Device Drivers
Hardware

10. iPhone 4 Teardown
GSM (Global System for Mobile communications): 2G, 3G, 4G ..
UMTS (Universal Mobile Telecommunications Systems): one of 3G technologies being developed into 4G

11. iPhone 4 Teardown 512MB Mobile DDR Audio Codec (Cirrus Logic)
Samsung flash memory (32GB): K9PFG08
Audio Codec (Cirrus Logic)
512MB Mobile DDR
A4 Processor (ARM Cortex A8) designed by Apple manufactured by Samsung
GSM and more
GSM (Global System for Mobile communications): 3G

12. iPhone 4 Teardown
Accelerometer detects when the user has rotated the device from portrait to landscape, then automatically changes the contents of the display accordingly
Proximity sensor detects when you lift iPhone to your ear and immediately turns off the display to save power and prevent inadvertent touches until iPhone is moved away
Ambient light sensor automatically adjusts the display’s brightness to the appropriate level for the current ambient light, enhancing the user experience and saving power at the same time

13. iPhone 5 Teardown Accelerometer Touchscreen controller
A6 application processor, based off the ARMv7 ISA
1GB Elpida LP (Low Power) DDR2 integrated according to Chipworks
LTE modem
16GB NAND Flash from Hynix
Wi-Fi module
3-axis gyroscope

14. Galaxy S3 Teardown Samsung 16GB eMMC (MultiMediCard) + 64MB NAND Flash
Intel Wireless Processor
Exynos 4412: Quad-core A9 with 1GB DDR2

15. Exynos 4412 Block Diagram MFC: Multi Format Codec
What is PoP Memory?
DECEMBER 19, 2009
Package-on-Package or (PoP) memory was created as a way to reduce the physical size of the memory sub-system on a single board computer. The basic idea is to stack two BGA devices one on top of the other as shown above.
PoP Memory has Several Advantages Including:
More reliable manufacture because the memory sub-system can be assembled separately from the final system.
Higher memory cycle speeds due to shorter connection lengths.
Small size
This type of memory is used in handsets and other types of portable devices and is also making it’s way into mid-level products as well.
Disadvantages Include:
BGA assemble issues, can only re-ball the part a limited number of times then it must be scrapped. So, for example, if the RAM portion fails, the FLASH could be de-soldered and re-soldered to a working RAM module, but only a limited number of times.
Test issues – BGA packages do not allow access to device pins once the device is soldered down. In the case of a PoP module, since the top module is soldered to the bottom, there is no way to access the pins. Typically JTAG boundary-Scan tools can be used to test in this configuration.
MFC: Multi Format Codec
PoP: Package-on-Package

16. Components of Embedded Systems
Hardware
It is mainly composed of processor (1 or more), memory, I/O devices including network devices, timers, sensors etc.

17. Components of Embedded Systems
Software - System software
Operating systems
Many times, a multitasking (multithreaded) OS is required, as embedded applications become complicated
Networking, GUI, Audio, Video
CPU is context-switched to process multiple jobs
Operating system footprint should be small enough to fit into memory of an embedded system
In the past and even now, real-time operating systems (RTOS) such as VxWorks and uC/OS-II have been used because they are light-weighted in terms of memory requirement
Nowadays, heavy-weighted OSs such as iOS, Android, Windows Mobile, and embedded Linux (uClinux) are used, as embedded processors support computing power and advanced capabilities such as MMU (Memory Management Unit)
Device drivers for I/O devices

18. Components of Embedded Systems (Cont)
Software (cont.) - Application software
Run on top of operating system
Execute tasks that users wish to perform
Web surfing, Social Network Service, Audio, Video playback

19. Hard real-time systems
Real-time operating system (RTOS): Multitasking operating system for real-time applications
RTOS is valued for how quickly and/or predictably respond to a particular event
Hard real-time systems are required to complete a critical task within a guaranteed amount of time
Soft real-time systems are less restrictive
Implementing real-time system requires a careful design of scheduler
System must have the priority-based scheduling
Real-time processes must have the highest priority
Priority inheritance (next slide)
Solve the priority inversion problem
Process dispatch latency must be small
Hard real-time systems
Hard real-time system examples: pacemaker and car control system

20. Priority Inversion Problem
Pathfinder mission on Mars in 1997
Used VxWorks, an RTOS kernel, from WindRiver
Software problems caused the total system resets of the Pathfinder spacecraft in mission
Watchdog timer goes off, informing that something has gone dramatically wrong and initiating the system reset

21. Priority Inversion Problem
VxWorks provides preemptive priority scheduling of threads
Tasks on the Pathfinder spacecraft were executed as threads with priorities that were assigned in the usual manner reflecting the relative urgency of these tasks.
Task 1 tries to get the semaphore
Task 1 gets the semaphore
and execute
Task 1 preempts Task3
Priority Inversion
Task 1
(highest priority)
Task 2
(medium priority)
Task 2 preempts task 3
Task 3
(lowest priority)
Task 3 is resumed
Time
Task 3 gets semaphore
Task 3 is resumed
Task 3 releases the semaphore

22. Priority Inheritance
A lower priority process could be accessing a critical section (a shared resource) that the higher priority process needs
The process with a lower priority inherits the higher priority until they are done with the resource
When they are finished, its priority reverts to its original value
Task 1 tries to get the semaphore
(Priority of Task 3 is raised to Task 1’s)
Task 1 preempts Task3
Task 1 completes
Priority Inversion
Task 1
(highest priority)
Task 2
(medium priority)
Task 3
(lowest priority)
Time
Task 3 gets semaphore
Task 3 is resumed
with the highest priority
Task 3 releases the semaphore

23. Operating Systems for Embedded Systems
RTOSs
pSOS
VxWorks
VRTX (Versatile Real-Time Executive)
uC/OS-II
Palm OS & Symbian OS(source: Wikipedia)
Palm OS: Embedded operating system initially developed by U.S. Robotics-owned Palm Computing, Inc. for personal digital assistants (PDAs) in 1996
Symbian OS: Proprietary operating system designed for mobile devices by Symbian Ltd. A descendant of Psion's EPOC and runs exclusively on ARM processors
Android (
Open Handset Alliance Project
Based on modified version of Linux 2.6 kernel
Currently supporting ARM, MIPS, and x86

24. A Computer System (~ 2010) But, don’t forget the big picture! CPU
Main Memory
FSB
(Front-Side Bus)
North Bridge
Graphics card
DMI
(Direct Media I/F)
Peripheral devices
South Bridge
Hard disk
USB
PCIe card
But, don’t forget the big picture!

25. Evolution of Computer Systems
Core i7– based Systems
Core 2 Duo – based Systems
CPU
North Bridge
South Bridge
Main Memory
(DDR2)
FSB
(Front-Side Bus)
DMI
(Direct Media I/F)
CPU
IOH (Input/Output Hub)
South Bridge
Main Memory
(DDR3)
DMI
(Direct Media I/F)
Quickpath (Intel) or
Hypertransport (AMD)
Keep in mind that CPU and computer systems are evolving at a fast pace

26. Core i7 (Ivy Bridge)-based Systems
FDI or Flexible Display Interface is an interconnect created by Intel in order to allow the communication of the HD Graphics integrated GPU found on supported CPUs with the PCH southbridge where display connectors are attached. It provides a path between an Intel processor and an Intel southbridge on a computer motherboard which carries display data from the graphics controller (North Display) of the Intel processor package to the display connectors attached at some PCH (South Display) versions.
FDI: Flexible Display Interface
SPI: Serial Peripheral Interface
SMBus: System Management Bus

27. x86?
What is x86?
Generic term referring to processors from Intel, AMD and VIA
Derived from the model numbers of the first few generations of processors:
8086, 80286, 80386,  x86
Now it generally refers to processors from Intel, AMD, and VIA
x86-16: 16-bit processor
x86-32 (aka IA32): 32-bit processor * IA: Intel Architecture
x86-64: 64-bit processor
Intel takes about 80% of the PC market and AMD takes about 20%
Apple also have been introducing Intel-based Mac from Nov. 2006
* aka: also known as

28. x86 History (as of 2008)

29. x86 History (Cont.) 2009 2011 2013 2012 4-bit 8-bit 16-bit
32-bit (i386)
32-bit (i586)
32-bit (i686)
64-bit (x86_64)
2009
2011
1st Gen. Core i7
(Nehalem)
2nd Gen. Core i7
(Sandy Bridge)
2013
2012
4th Gen. Core i7
(Haswell)
3rd Gen. Core i7
(Ivy Bridge)

30. Chipset We call North and South Bridges as Chipset
Chipset has many PCIe devices inside
North Bridge
Memory controller
PCI express ports to connect Graphics card
South Bridge
HDD (Hard-disk) controller
USB controller
Various peripherals connected
Keyboard, mouse, timer etc
PCI express ports
Note that the landscape is being changed!
For example, memory controller is integrated into CPU

31. PCI, PCI Express Devices
PCI (Peripheral Component Interconnect)
Computer bus connecting all the peripheral devices to the computer motherboard
PCIe (PCI Express)
Replaced PCI in 2004
Point-to-point connection
PCI express slot x16
PCI express slots
PCI slot

32. An Old GP Computer System Example

33. PCI Express Slots in GP Systems

34. GP Computer System in terms of PCIe
North Bridge
South Bridge

35. Software Stack Applications Operating System BIOS Computer Hardware
(MS-office, Google Earth…)
API
(Application Program I/F)
Operating System
(Linux, Vista, Mac OS …)
BIOS provides
common I/Fs
BIOS
(AMI, Phoenix Technologies …)
Computer Hardware
(CPU, Chipset, PCIe cards ...)

36. How the GP Computer System Works?
x86-based system starts to execute from the reset address 0xFFFF_FFF0
The first instruction is “jmp xxx” off from BIOS ROM
BIOS (Basic Input/Output System)
Detect and initialize all the devices (including PCI devices via PCI enumeration) on the system
Provide common interfaces to OS
Hand over the control to OS OS
Manage the system resources such as main memory
Control and coordinate the use of the hardware among various application programs for the various users
Provide APIs for system and application programming

37. So… What? How is it different from embedded systems?
General-purpose computer systems provide programmability to end-users
You can do any kinds of programming on your PC
C, C++, C#, Java etc
General-purpose systems should provide backward compatibility
A new system should be able to run legacy software, which could be in the form of binaries with no source codes written 30 years ago
So, general purpose computer system becomes messy and complicated, still containing all legacy hardware functionalities

38. x86 Operation Modes Real Mode (= real address mode) Protected Mode
Programming environment of the 8086 processor
8086 is a 16-bit processor from Intel
Protected Mode
Native state of the 32-bit Intel processor
For example, Windows is running in protected mode if 32-bit Windows is installed on your PC
32-bit mode
IA-32e mode (IA-32 Extended Mode)
There are 2 sub modes
Compatibility mode
64-bit mode

39. Registers in 8086 Registers inside the 8086 Registers in x86-32
16-bit segment registers
CS, DS, SS, ES
General-purpose registers
all 16-bits
AX, BX, CX, DX, SP, BP, SI, DI
Registers in x86-32

40. Real Mode Addressing
In real mode (8086), general purpose registers are all 16-bit wide
Real model
Segment registers specify the base address of each segment
Segment registers
CS: Code Segment -> used to access instructions
DS: Data Segment -> used to store data
SS: Stack Segment -> Stack
ES: Extra Segment -> could be used to store more data
Addressing method
Segment << 4 + offset = physical address
Example:
mov ax, 2000h
mov ds, ax
 Data segment starts from 20000h (2000h << 4)
Main Memory
(1MB)

41. Data Segment in Real Mode
Memory addressing in real mode (8086)
0xFFFFF
Main Memory
(1MB)
mov ax, 2000h
mov ds, ax
mov al, [100h]
20100h
offset
100h DS
2000h
20000h = 2000h << 4
0x0

42. A20M
8088/8086 allows only 1MB memory access since they have only 20-bit physical address lines
220 = 1MB
Memory is accessed with segment:offset in 8086/8088 (still the same though)
What if CS=0xFFFF, IP=0x0020?
CS << 4 + IP = 0x100010
But, we have only 20 address lines. So, 8088 ends up accessing 0x00010 ignoring the “1” in A20
Some (weird?) programmers took advantage of this mechanism

43. A20M (Cont)
How about now?
Your Core 2 Duo has 48-bit physical address lines
What happens if there is no protection in the previous case
Processor will access 0x100010, breaking the legacy code
So, x86 provides a mechanism called A20M (A20 Mask) to make it compatible with the old generations

44. A20M (Cont)
This was accomplished by inserting a logic gate on the A20 line between the processor and system bus, which got named Gate-A20. Gate-A20 can be enabled or disabled by software to allow or prevent the address bus from receiving a signal from A20. It is set to non-passing for the execution of older programs which rely on the wrap-around. At boot time, the BIOS first enables Gate-A20 when counting and testing all of the system's memory, and disables it before transferring control to the operating system. -Wiki

45. Another Example Protected mode addressing (32-bit)
As application programs become larger, 1MB main memory is too small
Intel introduced protected mode to address a larger memory (up to 4GB)
But, Intel still wants to use 16-bit segment registers for the backward compatability
How to access a 4GB space with a 16-bit register?

46. Protected Mode Addressing
TI = 0
TI = 1
Hardware
Inside the CPU
(Registers)
Main
memory
Index
Segment Selector TI
RPL
Visible to software
GDT
LDT
Segment Descriptor
Segment Descriptor
Segment Descriptor
Segment Descriptor
Invisible to software
TI: Table Indicator
RPL: Requested Privilege Level
Segment Descriptor
Segment Descriptor
Segment Descriptor
Segment Descriptor
Base
Access info
Limit
Segment Descriptor
Segment Descriptor
TI: Table Indicator
RPL: Requested Privilege Level

47. Segment Descriptor Format
Software (OS) creates descriptor tables (GDT, LDT)

48. Address Translation in Protected Mode

49. One More Example 8259 Interrupt Controller Still in South Bridge IR0
CPU
North Bridge
South Bridge
Main Memory
(DDR)
FSB
(Front-Side Bus)
DMI
(Direct Media I/F)
IR0
IR1
IR2
IR3
IR4
IR5
IR6
IR7
INTR
INTA
82C59A
(Master)
(Slave)
CPU (8086)
Still in South Bridge

50. APIC: Advanced Programmable Interrupt Controller
APICs and 8259s
Local APICs
IO APICs
8259s
APIC: Advanced Programmable Interrupt Controller
DMI: Direct Media Interface, ESI: Enterprise SouthbBridge Interface

51. Backup Slides

52. 8259 in Prehistoric Era