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1 CSC 2405: Computer Systems II Spring 2012 Dr. Tom Way
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2 Facilities for Programming Unix cluster – Machines: csgate, tanner, degas, cezanne, picasso,rodin, cassatt, gauguin, matisse – List displayed when logging into csgate Linux machines – felix, helix Logging in to the machines remotely – SSH available for download from the CSC website
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3 Key to Success Start early to allow time for debugging.
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4 Policies: Write your own code Programming in an individual creative process much like composition. You must reach your own understanding of the problem and discover a path to its solution. During this time, discussions with friends are encouraged. However, when the time comes to write code that solves the problem, such discussions are no longer appropriate – The program must be your own work –
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Villanova University5 Memory Hierarchy Cache Principle The more frequently data is accessed, the faster the access should be.
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Villanova University6 Central Processing Unit (CPU) Runs the loop Fetch-Decode-Execute Fetch Next Instruction START Execute Instruction Execute Instruction Execute Instruction HALT Fetch CycleExecute Cycle Decode Instruction START Decode Cycle Fetch the next instruction from memory Decode the instruction to figure out what to do Execute the instruction and store the result
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Villanova University7 Fetch-Decode-Execute Where is the “next instruction” held in the machine? – a CPU register called the Program Counter (PC) holds the address of the instruction to be fetched next Fetch cycle – Copy instruction from memory into Instruction Register (IR) Decode cycle – Decode instruction and fetch operands, if necessary Execute cycle – Execute the instruction – Increment PC by the instruction length after execution (assuming that all instructions are the same length)
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Villanova University8 Device Controller Special-purpose processor In charge of a particular device type Has registers (data, control, status) Has local buffer storage I/O is from the device to local buffer of controller CPU moves data from/to memory to/from local buffer I/O devices and CPU can execute concurrently
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Villanova University9 I/O Operation Example CPU Keyboard Controller Keyboard c = getchar();
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Villanova University10 Input / Output (I/O) To start an I/O operation, the CPU tells the controller: – The chunk size be transferred (eg, one character) – Goes off to do something else The device controller: – Checks registers to determine what to do (read, write) – Transfers data to/from device from/to local buffer – Informs the CPU when transfer is complete (HOW?)
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Villanova University11 Hardware may trigger interrupts at any time by sending a signal to the CPU by way of system bus When the CPU is interrupted – Stops what it is doing – Transfers control to a fixed memory location (Interrupt Vector) Hardware Interrupts
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Villanova University12 A table of pointers (addresses) at a fixed memory location Contains addresses of interrupt service routines Indexed by a unique device number – Given with the interrupt request Interrupt Vector Interrupt vector 0 OS code for disk interrupt OS code for divide by zero trap 1 2......
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Villanova University13 Interrupt Handling The interrupt architecture – Must save the Program Counter (PC) prior to transferring control to the interrupt service routine (interrupt handler) – Restore PC upon returning from interrupt Interrupt handler – Save registers that are to be modified onto the stack – Service request (eg, copy data from local buffer in memory) – Mark the process blocked on I/O as ready to run – Restore registers from the stack Interrupted computation resumes as the point it left off.
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Villanova University14 When does the CPU Check for Interrupts? Fetch Next Instruction START Execute Instruction Execute Instruction Execute Instruction HALT Fetch CycleExecute Cycle Decode Instruction START Decode Cycle ???
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Villanova University15 Interrupts must be handled quickly Interrupts are a critical part of a computer system – They allow a program to be interrupted, so the computer may deal with an urgent event All modern computer systems are interrupt-driven CPU Cycle with Interrupts START Execute Instruction Check for Interrupt: Process Interrupt Check for Interrupt: Process Interrupt Fetch Cycle Decode CycleExecute CycleInterrupt Check Interrupts disabled Interrupts Enabled Fetch Instruction Decode Instruction START HALT
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Villanova University16 Direct Memory Access I/O To start an I/O operation, the CPU tells the DMA controller: – The chunk size to be transferred (eg, 4096 bytes of data) – The memory address where the chunk ought to be stored The DMA controller – Accesses the device via its controller – Transfers the chunk from/to device to/from system MEMORY – Interrupts CPU when transfer is complete Benefits – The CPU is only involved at the start and end of transfer – Interrupts are now less frequent – Hence, CPU can do a lot of work between interrupts
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Villanova University17 count = read(fd,buffer,nbytes); DMA Example CPU Disk Controller Disk driveMemory
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Villanova University18 Where Does the OS Fit? Operating System System Calls Users and User Programs Web Browser Music Player Interrupts Device Control
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Villanova University19 Software may trigger interrupts by system calls or illegal operations (such as invalid memory access, divide by zero) Software Interrupts Hardware Operating System Users and User Programs System Calls
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Villanova University20 System Call Example (1) What happens when a user executes a system call such as read? In Unix, for instance: count = read(fd,buffer,nbytes) which reads up to nbytes from the file described by fd into buffer. The actual number of bytes read is returned Steps: 1.Push third parameter on to the stack. 2.Push second parameter on to the stack. 3.Push first parameter on to the stack. 4.Call the library routine, which involves pushing the return address on to the stack and jumping to the routine.
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Villanova University21 System Call Example (2)
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Villanova University22 System Call Example (3) 5.Machine/OS dependent actions. One is to put the system call number for read in a well defined place, e.g., a specific register. This requires assembly language. 6.Trap to the kernel (assembly language). This enters the operating system properly and shifts the computer to privileged mode. 7.The envelope uses the system call number to access a table of pointers to find the handler for this system call. 8.The read system call handler processes the request (see below).
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Villanova University23 System Call Example (4) 9.Some magic instruction returns to user mode and jumps to the location right after the trap. 10.The library routine returns (count is also returned). 11.The stack is popped (ending the function call read).
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Villanova University24 The Operating System Resource Principle An Operating Systems is a set of algorithms that allocates resources to processes. Beautification Principle An Operating Systems is a set of algorithms that hide the details of the hardware and provide a more pleasant environment
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Villanova University25 DMA Exercise Suppose that a user program requests the following data transfer: Read 4096 bytes of data from file “test” into array “mybuffer” Describe in detail all steps involved: OS activities DMA controller activities CPU activities
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Villanova University26 Summary Main computer system components: – CPU, Memory, I/O Devices Fetch-Decode-Execute-InterruptCheck cycle I/O device controllers – Special processors – Use local buffers for I/O transfer Software interrupts (system calls, traps) vs. hardware interrupts Interrupt handling steps Interrupt-Driven I/O with DMA
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