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Shannon’s Expansion Muxes and Encoders. Tri-State Buffers  A tri-state buffer has one input x, one output f and one control line e Z means high impedance,

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Presentation on theme: "Shannon’s Expansion Muxes and Encoders. Tri-State Buffers  A tri-state buffer has one input x, one output f and one control line e Z means high impedance,"— Presentation transcript:

1 Shannon’s Expansion Muxes and Encoders

2 Tri-State Buffers  A tri-state buffer has one input x, one output f and one control line e Z means high impedance, i.e. no output at all x f e x f e = 0 e = 1 x f Equivalent circuits normal tri-state buffer symbol exf 00z 01z 100 111

3 Other Types of Tri-State Buffers x f e x f e x f e x f e active high, not invertedactive high, inverted active low, invertedactive low, not inverted output is enabled (connected) when e = 1 output is enabled (connected) when e = 0

4 2x1 MUX Using Tri-State Buffers  Tri-state buffers can be used in place of SOP form Note – this is the one case where the output lines can just be “tied together” The control line s selects which buffer will pass its input f w 0 w 1 s

5 Crossbar Switch  A crossbar switch connects any input to any output  A 2x2 crossbar connects 2 inputs to 2 outputs You can route each input straight thru, or cross them When s = 0, y1 = x1 and y2 = x2 (no switching) When s = 1, y1 = x2 and y2 = x1 (switched) x 1 x 2 y 1 y 2 s

6 2x2 Crossbar Switch Using MUXes  A 2x2 crossbar can be constructed from 2x1 MUXes x 1 0 1 x 2 0 1 s y 1 y 2

7 Using MUXes for Synthesis  MUXes are very significant combinational devices  MUXes are a key component of FPGAs (field programmable gate arrays) – to be discussed soon  MUXes can be used to synthesize any combinational logic function Makes use to Shannon's expansion

8 Shannon's Expansion  Any Boolean function f(w 1,w 2,…,w n ) can be written in the form f(w 1,w 2,…,w n ) = w 1 ' f(0,w 2,…,w n ) + w 1 f(1,w 2,…,w n ) w 1 acts as the selector control input and it selects between f(0,w 2,…,w n ) and f(1,w 2,…,w n ) f(0,w 2,…,w n ) is called the cofactor of f with respect to w 1 ' f(1,w 2,…,w n ) is called the cofactor of f with respect to w 1  Example: f(w 1,w 2,w 3 ) = w 1 w 2 + w 1 w 3 + w 2 w 3 w 1 ' f(0,w 2,w 3 ) + w 1 f(1,w 2,w 3 ) = w 1 ' (w 2 w 3 ) + w 1 (w 2 + w 3 )

9 MUXes Based on Shannon's Expansion  f(w 1,w 2,w 3 ) = w 1 ' (w 2 w 3 ) + w 1 (w 2 + w 3 ) is implemented using a 2x1 MUX as follows … f w 3 w 1 w 2 0 1

10 More Shannon's Expansion Examples  f(w 1,w 2,w 3 ) = w 1 'w 3 ' + w 1 w 2 + w 1 w 3  Expand on w 1 : f(w 1,w 2,w 3 ) = w 1 ' f(0, w 2,w 3 ) + w 1 f(1,w 2,w 3 ) = w 1 ' (w 3 ') + w 1 (w 2 + w 3 )  Use a 2x1 MUX 0 1

11 Same Example ….  f(w 1,w 2,w 3 ) = w 1 'w 3 ' + w 1 w 2 + w 1 w 3  Expand on both w 1 and w 2 : f(w 1,w 2,w 3 ) = w 1 'w 2 'f(0,0,w 3 ) + w 1 'w 2 f(0,1,w 3 ) + w 1 w 2 'f(1,0,w 3 ) + w 1 w 2 f(1,1,w 3 ) = w 1 'w 2 '(w 3 ') + w 1 'w 2 (w 3 ') + w 1 w 2 '(w 3 ) + w 1 w 2 (1)  Use a 4x1 MUX

12 Implementing Using Only MUXes  Shannon's expansion can be used to implement functions using MUXes exclusively  Example: f(w 1,w 2,w 3 ) = w 1 w 2 + w 1 w 3 + w 2 w 3  Use 2x1 MUXes only to implement this  Expanding on w 1 f(w 1,w 2,w 3 ) = w 1 '(w 2 w 3 ) + w 1 (w 2 +w 3 +w 2 w 3 ) Let g = w 2 w 3 Let h = w 2 +w 3 +w 2 w 3

13 Example Continued …  f(w 1,w 2,w 3 ) = w 1 '(g) + w 1 (h) where g = w 2 w 3 where h = w 2 +w 3 +w 2 w 3  Expanding g on w 2 gives g = w 2 '(0) + w 2 (w 3 )  Expanding h on w 2 gives h = w 2 '(w 3 ) + w 2 (1) w 2 0 w 3 1 f w 1

14 Last Example: Use Only a 4x1 MUX  Try this one: f(w 1,w 2,w 3 ) =  m(3,5,6,7)  f = w 1 'w 2 w 3 + w 1 w 2 'w 3 + w 1 w 2 w 3 ' + w 1 w 2 w 3  Use a 4x1 MUX by expanding on both w 1 and w 2 f = w 1 'w 2 '(0) + w 1 'w 2 (w 3 ) + w 1 w 2 '(w 3 ) + w 1 w 2 (1) f w 1 0 w 2 1 w 3

15 Encoders  The opposite of decoding is encoding  Encoder encodes one-asserted information An 2 n bit one-hot value is presented as input A binary encoded output of size n is the result Example: input is 01000000  output is 110 (i.e. 6) 7 6 5 4 3 2 1 0 2 n inputs w 0 w 2 n 1– y 0 y n1– n outputs

16 4 to 2 Encoder  A 4 to 2 encoder encodes a 4 bit one-hot input into a 2 bit binary encoded output w3w3 w2w2 w1w1 w0w0 y1y1 y0y0 000100 001001 010010 100011 y 0 y 1 w 1 w 0 w 2 w 3

17 Building Encoders  Notice that since the input is guaranteed to be one- hot, the design of an encoder is simple y 1 = w 3 + w 2 y 0 = w 3 + w 1  Each output signal y is just the sum of the input signals that are asserted for the “on set” of y  These encoder types are called binary encoders w3w3 w2w2 w1w1 w0w0 y1y1 y0y0 000100 001001 010010 100011

18 Priority Encoders  What if you can’t guarantee, or don’t want to guarantee, that the input is one-hot?  You can encode the input with the highest priority Priority can be assigned in many ways One priority scheme is to pick the input lines in order according to position  Example: input is 01100100  output is 110 since line 6 is “more significant” than line 5 or line 2  What if input is 00000000? Compare to 00000001? 7 6 5 4 3 2 1 0

19 4 to 2 Priority Encoder  4 input lines (w 3 :w 0 ) w 3 has highest priority; w 0 has lowest priority  2 output lines (y 1 :y 0 )  1 “valid” (z) output to determine if any line is active at all w3w3 w2w2 w1w1 w0w0 y1y1 y0y0 z 0000xx0 0001001 001x011 01xx101 1xxx111

20 Logic for Priority Encoders  Leti 0 = w 3 'w 2 'w 1 'w 0 i 1 = w 3 'w 2 'w 1 i 2 = w 3 'w 2 i 3 = w 3  Theny 0 = i 1 + i 3 y 1 = i 2 + i 3  z = i 0 + i 1 + i 2 + i 3 same structure as one-hot encoder: sum of terms in the on set w3w3 w2w2 w1w1 w0w0 y1y1 y0y0 z 0000xx0 0001001 001x011 01xx101 1xxx111

21 74147 Priority Encoder  All inputs are active low  All outputs are active low 0110 is "9" 1110 is "1"


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