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IEEE-1394 Data Link Design Review Sherry Womack Erik Pace ECE 4040 Dr. Martin Brooke.

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Presentation on theme: "IEEE-1394 Data Link Design Review Sherry Womack Erik Pace ECE 4040 Dr. Martin Brooke."— Presentation transcript:

1 IEEE-1394 Data Link Design Review Sherry Womack Erik Pace ECE 4040 Dr. Martin Brooke

2 Overall View of Project

3 Introduction What is IEEE-1394? –FireWire –IEEE 1394-1995 Standard for a High Performance Serial Bus. –A standard for high-speed data communication between multimedia products.

4 Advantages of 1394 Versatility –Can link up to 63 devices without additional hardware. High speed –100 Mbps, 200 Mbps, 400 Mbps, or 1.2 Gbps. Low cost –Cost of implementation less than technology replaced. Ease of installation and use –Extends Plug and Play features beyond confines of PC.

5 What protocols does 1394 define? Physical –Bits on a wire –Arbitration –Reset and bus configuration Link –Packets on the wire Transaction –Read, write, lock, etc. Bus Management

6 1394 Protocol Stack and Serial Bus Management Controller

7 Physical Layer Chip TSB41LV03A IEEE 1394a Three-Port Cable Transceiver/Arbiter. Provides digital and analog transceiver functions needed to implement a 1394 network. Includes circuitry to monitor line conditions, for initialization and arbitration, and for packet reception and transmission.

8 Link Layer Chip TSB12LV42 (DVLynx) IEEE 1394-1995 Link Layer Controller for Digital Video. 1394 interface for high speed audio, video, and data applications. Provides a bulky data interface that supports long term data rates up to 60 Mbps.

9 Physical and Link Layer Connections

10 Cable Connections and Power Decoupling Network

11 Components

12 Vendors DigiKey Linear Technology Mouser National Semiconductor ON Semiconductor Texas Instruments

13 PCB Layout

14 Design Rules for PCB Layout Minimize the length of the etches between the physical layer and the cable connector Minimize the length of the etches between the physical and link layers

15 Design Rules for PCB Layout Keep the cable signal lines the same length Add power decoupling networks as close as possible to power pins

16 Design Rules for PCB Layout Place the power regulator away from the twisted pair edges, the clock crystal and the physical layer Regulator Physical Layer Twisted pair edges Clock crystal

17 Backplane Layout

18 Unresolved Issues Initialization state Processing link layer data Format of camera data –Asynchronous –Isochronous

19 Upcoming Milestones Board fabrication Testing Determination of initialization state Transmission of data


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