1. © 2008, Renesas Technology America, Inc., All Rights Reserved 1 Course Introduction Purpose  This training course provides an introduction to the M16C family of 16-bit microcontrollers (MCUs) and describes key device features and benefits Objectives  Learn the M16C MCU architecture  Discover the design features that make designing with M16C MCUs simpler then other architectures Content  39 pages (including this page)  7 questions Learning Time  36 minutes

2. © 2008, Renesas Technology America, Inc., All Rights Reserved 2 Key Features and Benefits Flexible and Trusted Flash Broad Platform Powerful Architecture Quiet Reliable Efficient Compatibility

3. © 2008, Renesas Technology America, Inc., All Rights Reserved 3 Broad Platform

4. © 2008, Renesas Technology America, Inc., All Rights Reserved 4 Key Features and Benfits Flexible and Trusted Flash Broad Platform Powerful Architecture Quiet Reliable Efficient Compatibility

5. © 2008, Renesas Technology America, Inc., All Rights Reserved 5 Powerful Architecture 3. Combined Instructions Loops If then else Function calls Jump tables Stack multiple Division 4-bit isolation Bit tables Bit pre-inversion 1. Variable Length Instructions Vary instruction DATA Vary instruction OPCODES Combine same source & destination 2. Memory operands SINGLE memory operands DUAL memory operands Shrinks program size Saves opcode cycles Requires fewer CPU registers

6. © 2008, Renesas Technology America, Inc., All Rights Reserved 6 Powerful Architecture Flow Control ADJNZSBJNZ JMPJMPIJMPS BCndJCnd JSRJSRIJSRSREITRTS ENTEREXITD INTINTO Data Transfer MOVMOVAMOVhlXCHG LDCSTCLDESTE LDCTXSTCTXLDINTBLDIPL STNZSTZSTZX PUSHPUSHMPUSHCPUSHA POPPOPMPOPC SMOVBSMOVFSSTR Misc. BRKNOPUNDWAIT Arithmetic ADDADDCFADCSUB SSB DADDDSUBDADCDSBB CMPTSTINCDEC ABSNEGEXTS MULMULURMPA DIVDIVUDIVX Logical ANDORXORNOT ROLCRORCROTSHASHL Bit Manipulation BANDBORBXORBNOT BNANDBNORBNXORBNTST BTSTBTSTCBTSTS BSETBCLRFSETFCLR Many instructions typically replace 2 or 3 traditional instructions Many instructions typically replace 2 or 3 traditional instructions

7. © 2008, Renesas Technology America, Inc., All Rights Reserved 7 Powerful Architecture InstructionFunctionAddressing Mode ADD 32bits+32bits=32bits (ADDition without carry) Immediate->register, immediate->memory, register->register, register- >memory, memory->register, memory->memory SUB 32bits+32bits=32bits (SUBtraction without borrow) Immediate->register, immediate->memory, register->register, register- >memory, memory->register, memory->memory CMP 32bits CompareImmediate->register, immediate->memory, register->register, register- >memory, memory->register, memory->memory MOV 32bits TransferImmediate->register, immediate->memory, register->register, register- >memory, memory->register, memory->memory PUSH/POP 32bits SaveImmediate, register, memory SHA 32bits Arithmetic shift (Built-in barrel shifter) register, memory SHL 32bits Logic shift (Built-in barrel shifter) register, memory MUL 32bits*32bits=32bits (Built-in Multiplier) register->register, register->memory DIV 32bits/32bits=32bitsregister->register, register->memory

8. © 2008, Renesas Technology America, Inc., All Rights Reserved 8 Cycles 72% of M16C/60 instructions execute in 3 cycles or less 20 execute in a single cycle and/or require only 1 byte 0102030405060 1 2 3 4 5 6 7 8 9 10 > 11 Percent M16C/60 MCUs Other 16-bit MCUs Quicker Instruction Execution

9. © 2008, Renesas Technology America, Inc., All Rights Reserved 9 Powerful Architecture Stack Base Register Static Base Register 0 15 R2 (Data Register) R3 (Data Register) A0 (Address Register) A1 (Address Register) FB (Frame Base Register) R1H (DR)R1L (DR) R0H (DR)R0L (DR) R2 (Data Register) R3 (Data Register) A0 (Address Register) A1 (Address Register) FB (Frame Base Register) R1H (DR)R1L (DR) R0H (DR)R0L (DR) 07 815 23 LEGEND Families: M16/Tiny, R8C, M16C/60, M16C/80 Examples in each family…. (M16C/26, R8C/25, M16C/62P, M16C/80) Families: M32C/80, R32C/100 Examples in this family…. M32C/87, R32C/111 16 Bit Multiplier 16/32 Bit Barrel Shifter 019 User Stack Pointer Interrupt Stack Pointer Flag Register 0 15 Interrupt Table Register 23 Program Counter 0 15 Flag Save Register (SVF) PC Save Register (SVP) Vector Register (VCT) 23 015 23

10. © 2008, Renesas Technology America, Inc., All Rights Reserved 10 Powerful Architecture

11. © 2008, Renesas Technology America, Inc., All Rights Reserved 11 Powerful Architecture

13. © 2008, Renesas Technology America, Inc., All Rights Reserved 13 Key Features and Benfits Flexible and Trusted Flash Broad Platform Powerful Architecture Quiet Reliable Efficient Compatibility

14. © 2008, Renesas Technology America, Inc., All Rights Reserved 14 Quiet Decoupled I/O and CPU/peripheral supply rings Huge on-chip capacitor Optimized output impedance Local stabilization terminals of analog circuit Xin Vss ADC CPUFLASH Peripherals VU/DC VccNMIXoutRESET VssVcc GND RESET Pin assignment optimized for bypass capacitor and oscillator layout Symmetric terminals for I/O supply ring AVss AVcc Single-supply on-chip Voltage Up/Down converter

15. © 2008, Renesas Technology America, Inc., All Rights Reserved 15 Quiet Competition’s Example of a noise preventing circuit Control signal lines protected with noise filters and capacitors Power supply ferrite beads placed on the VCC pin MCU Renesas Example of an M16C-based circuit Capacitors and resistors unnecessary Up to 60% Better EMI Performance Noise Free/Immune - Low EMI/EMS

16. © 2008, Renesas Technology America, Inc., All Rights Reserved 16 Quiet H8/300H78K-IVSH2 M32C/83 (30MHz) M16C/62 (16MHz) M16C/80 (20MHz) CISC MCU “A” CISC MCU “C” RISC MCU “A”

18. © 2008, Renesas Technology America, Inc., All Rights Reserved 18 Key Features and Benfits Flexible and Trusted Flash Broad Platform Powerful Architecture Quiet Reliable Efficient Compatibility

19. © 2008, Renesas Technology America, Inc., All Rights Reserved 19 Reliable Noise Immunity

20. © 2008, Renesas Technology America, Inc., All Rights Reserved 20 Reliable Clocking

21. © 2008, Renesas Technology America, Inc., All Rights Reserved 21 Reliable Operation

22. © 2008, Renesas Technology America, Inc., All Rights Reserved 22 Reliable WDT

24. © 2008, Renesas Technology America, Inc., All Rights Reserved 24 Key Features and Benfits Flexible and Trusted Flash Broad Platform Powerful Architecture Quiet Reliable Efficient Compatibility

25. © 2008, Renesas Technology America, Inc., All Rights Reserved 25 Flexible and Trusted Flash Flash sizes from 2KB to 1024KB Single-supply program/erase, down to 2.7V Independent flash sequencer High-speed operation: 8 sec erase/write for 256KB 10-year data retention Multiple methods for safeguarding data Three programming methods: Programmer, CPU/User Mode, Boot Mode On-chip boot loader

26. © 2008, Renesas Technology America, Inc., All Rights Reserved 26  Software Lock bit — protects each block against erroneous erase/write operations.  Copy Guard — protects MCU’s internal memory against external readout, so important programs or data can’t be copied.  ROM-Code Protection — protects the internal flash memory against readout or rewriting during a parallel rewrite operation. (The ROM-Code Protect bit can only be rewritten in serial mode.)  ID-Code Protection — protects flash memory contents against illegal access during serial rewrite operation by rejecting commands unless the ID code written in the chip matches the ID code sent by the serial programmer. (Setting the ID-Code Protection bit makes repetitive ID code confirmation impossible.) Safeguarding the Data in Flash

28. © 2008, Renesas Technology America, Inc., All Rights Reserved 28 Key Features and Benfits Flexible and Trusted Flash Broad Platform Powerful Architecture Quiet Reliable Efficient Compatibility

29. © 2008, Renesas Technology America, Inc., All Rights Reserved 29 Efficient Clocking

30. © 2008, Renesas Technology America, Inc., All Rights Reserved 30 Power Consumption Icc (typical) ClockOperating Mode Vcc 2.1µW (-99.99125%) 0.7µAStop 5.4µW (-99.9775%) 1.8µA32kHzWait 24mW 8mA10MHzNormal 3V 4µW (-99.995%) 0.8µA None Stop 10µW (-99.9875%) 2.0µA32kHzWait 80mW 16mA20MHzNormal 5V None Efficient Operating Modes Save Power

31. © 2008, Renesas Technology America, Inc., All Rights Reserved 31 Efficient Code

33. © 2008, Renesas Technology America, Inc., All Rights Reserved 33 Key Features and Benfits Flexible and Trusted Flash Broad Platform Powerful Architecture Quiet Reliable Efficient Compatibility

34. © 2008, Renesas Technology America, Inc., All Rights Reserved 34 Compatibility

35. © 2008, Renesas Technology America, Inc., All Rights Reserved 35 Compatibility

36. © 2008, Renesas Technology America, Inc., All Rights Reserved 36 Compatibility M16C/61 M16C/62 M16C/80 M32C/8x More upward-compatible pin assignments Highest number of useable pins

37. © 2008, Renesas Technology America, Inc., All Rights Reserved 37 Compatibility Industry’s most upward-compatible pin assignments Pin Compatibility - Single Socket, Multiple MCUs STxD4 M16C/83 RXD4/SCL4 M16C/80 SIN4 M16C/62 12 100 99 Port 9 pin 7/ A/D Trigger M16C/61