1. By: Nadav Haklai & Noam Rabinovici Supervisors: Mike Sumszyk & Roni Lavi Semester:Spring 2010

2.  USB - Standard for peripheral devices  The USB mass storage device class  ISP1761 - single-chip Hi-Speed Universal Serial Bus (USB) On-The-Go (OTG) Controller  SD-Card - Non-Volatile memory card format  Very popular and common (Cameras, Embedded Systems)  Fat - File System

3.  Create a stand alone bridge between the USB and SD-Card interfaces  Transfer files easily between the devices.  No computer is needed.  Hardware - ALTERA Stratix III FPGA and SOPC Core USB to SD Project

4.  Software:  Quartus II 9.1 SP1  SOPC Builder  NIOS II IDE 9.1  Hardware:  Altera DE3 Board ▪ Stratix III FPGA ▪ Soft NIOS II Core ▪ USB Controller - ISP1761

5. 1. Study system devices and technologies in depth (USB and SD-Card Protocols and layers) 2. Analyze System Requirements 3. Create Soft NIOS Core in SOPC Builder 4. Develop HW environment 5. Develop SW using NIOS II IDE 6. Debug & Improvements

6.  Specify target FPGA and clock settings  Adding peripherals:  NIOS II core  On-chip memory  USB ISP 1761 core  SD-Card Core  Generating system SD-Card Socket

7.  Use DE3 System Builder to generate project  Pin assignments and board configuration  Integrate SOPC Builder into Quartus II project  Integrate custom HW modules  Set design constrains:  Timing requirements  Compiling HW design for DE3 board  Analysis & Synthesis  Place & Route

8.  USB SW design Layers: NIOS II PIO ISP 1761 HAL USB HOST Controller USB Protocol USB mass storage device Driver FAT File System Program NIOS II PIO SD-Card Driver FAT File System Program  SD-Card SW design Layers:

9.  DE3 Design examples:  The DE3 offers USB Host and SD-Card code examples  The interfaces examples support read-only mode from the USB or SD devices  The examples are not documented and messy.  Required SW Development  The examples will be used as a starting point.  USB and SD drivers will be modified to add write support.  Design the high program layer  FAT File system will be implemented to allow the work with files on the SD- Card and the USB mass storage device.

10.  Debug:  Download SW to NIOS II System on DE3 Board  Run / Debug SW on DE3  Refine SW & HW  Improvements:  Consider using DMA to speed up the transfers  Consider switching to the new unsupported NIOS EDS (instead of the NIOS IDE)

11. Estimated Time:Goal: 3 weeksStudy the protocols and examples 1 weekDesign SOPC Core 1 weekDesign HW Midterm Presentation 5 weeksDesign SW: Fat File System SD-Card Driver USB Driver Main Program 2 weeksDebug and Improvements Final Presentation