1. CCD and CCD readout : Engineering diagnostics during development, commissioning and operation Pierre Antilogus C. Juramy, H.Lebbolo, S. Russo, V.Tocut BNL, Raft Electronic Workshop January 25 th 2012

2. why talking about diagnostic & monitoring ? And why now ? -LSST focal plan is characterized by 3 key properties never used at this scale: -Its size -Its electronic density -No direct access to the readout electronic and signal during data taking -At the same time we have to -do its commissioning, namely optimally run the camera focal plane sensors and associated electronic, in a reasonable amount of time. -guaranty its reliability/stability/long-term term maintenance capability over the 10-15 years of the LSST run. -We enter in a phase of test / qualification, where we develop diagnostic tools / idea, we should keep track of this and use this expertise to feed back change in our design -At the same time we are starting the next round of design, discussing changes (ASPIC III, CABAC, FE, BE, …. ), it’s a good time to review our design with an higher attention in the fact than we will have to debug, qualify, run and maintain the CCD & CCD readout. -So with this talk, we underline a few “features” in the raft electronic to achieve this goal. CCD & CCD readout : Diagnositc, BNL – Elec Raft review – Jan 2012

3. Raft-level diagnostics Possible issues at raft level: –Debugging failed connections –Dealing with multiple crosstalk sources –Additional sources of noise –Optimization of CCD & ASICs running setup ( clocks, V,…) Outputs at raft level: –Digitized outputs: temperatures, DC levels –Analog outputs (multiplexed): clocks, “transparent” ASPIC output Firmware / software : –Possibility to modify individual clocks, sequence, clocks offsets …. CCD & CCD readout : Diagnositc, BNL – Elec Raft review – Jan 2012

4. CCD and raft-level monitoring Temperature: –CCDs –ASICs Other parameters affecting CCD response: –Bias voltages (ODs) –Substrate voltages Variations in behavior –CCD: response, output amplifiers (transparent ASPIC ?) –CABAC: Voltage delivery (aging at cold temperatures ?) –ASPIC: gain, noise, linearity CCD & CCD readout : Diagnositc, BNL – Elec Raft review – Jan 2012

5. A few proposals -Electronic calibration : injecting a known signal at the entrance of the ASPIC ( diagnostic and monitoring of aging / change / ASPIC & CCD amplifier behavior ) -Transparent mode in ASPIC : direct access to CCD output / issue with CCD base line, CCD signal rise … -Clamp continuously a sub-set of ASPIC channels : deactivate a channel, change the Xtalk profile. -CABAC MUX / access to clocks for clock fine tuning and diagnostic : comparison to expectation / simulation. -And also, not further here as it doesn’t request other change than putting temperature probe in as many component as possible : Using temperature to diagnose components CCD & CCD readout : Diagnositc, BNL – Elec Raft review – Jan 2012

6. Electronic calibration : injecting a known signal at the entrance of the ASPIC ( diagnostic and monitoring of aging / change ) CCD & CCD readout : Diagnositc, BNL – Elec Raft review – Jan 2012

7. Electronic Calibration Reset Calibration pulse RD Reset CCD out Ramp Down Ramp up XXX CCD & CCD readout : Diagnositc, BNL – Elec Raft review – Jan 2012

8. Reset Drain 3.3 v negative pulse AC connected to RD. Voltage divider made with coupling capacitor and RD decoupling capa. CCD & CCD readout : Diagnositc, BNL – Elec Raft review – Jan 2012

9. CABAC Possible implementation 8 bit DAC Pulser CCD trig To aspic Reset RD calib pulse CCD & CCD readout : Diagnositc, BNL – Elec Raft review – Jan 2012

10. RD calibration pulse : What next -e2v engineer contacted acknowledged this proposal, and underlined than : -They have used such routinely “RD pulse” to study the response of their CCD amps and readout chain -Combined with simultaneous action on I04, contribution of the second stage amplifier can be changed. -They have usually used pulse of -1 V (from nominal) on RD -The implementation of this function is foreseen in CABAC_0

11. Transparent mode in ASPIC : direct access to CCD output / issue with CCD base line, CCD signal rise, CCD pickup noise… CCD & CCD readout : Diagnositc, BNL – Elec Raft review – Jan 2012

12. CCD & Aspic spy CCD & CCD readout : Diagnositc, BNL – Elec Raft review – Jan 2012 -In the transparent mode the ASPIC, will not do a DSI, it will just provide an amplified differential output of the CCD signal for its 8 channels -This transparent mode can be extremely useful to debug a raft/CCD in a “test” cryostat -The BE for such “test” cryostat could be outside the cryostat, allowing a direct access to the FE signals using a scope, including the CCD output through this ASPIC transparent mode. -When the BE is inside the cryostat, we could use a mux to select one of the 8 channels and send it to a fast ADC to record the CCD output shape. -Different Mux configurations are possible and should be discussed : -A mux could be implemented inside the ASPIC, the output of this mux could then be send directly to a fast ADC on the BE, or multiplexed a second time on the FE using the CABAC mux and then send to a fast ADC on the BE. Remark : we may need also a mux on the BE in this case to direct the output of the CABAC mux to a specific fast ADC. This solution has a few draw backs : -Risk of interference inside the ASPIC -Complex chain of Mux ( up to 3 ) to configure -The mux could be implemented on the BE itself, sending 1 of the 24 ASPIC signal to one fast ADC on this board.  The decision to implement or not a mux in the ASPIC should be sold-out by March.

13. Aspic CCD & Aspic spy CCD Aspic Transparent mode Multiplexer BEB Fast ADC To readout Analog out CCD & CCD readout : Diagnositc, BNL – Elec Raft review – Jan 2012 Channel n°

14. CABAC MUX / access to clocks for clock fine tuning and diagnostic : comparison to expectation / simulation. CCD & CCD readout : Diagnositc, BNL – Elec Raft review – Jan 2012

15. CABAC Mux CCD & CCD readout : Diagnositc, BNL – Elec Raft review – Jan 2012 -The CABAC mux is mandatory to give access with a limited number of wires to all the clocks and bias delivered to the CCD inside the cryostat by the FE. - When the raft is in a “test” cryostat, and if the BE for such “test” is outside the cryostat, a direct access of the Mux outputs could be performed with a scope, allowing a fine tuning of the timing as the mux can select any pair of 2 clocks. -When the BE is inside the cryostat / the raft in the main camera, we could send the outputs of the CABAC Mux to a fast ADC to record the clocks shape. -The visible X-talk on the various clocks can teach a lot on the system interferences, and its access is mandatory to study & debug such high density system, (see PAN- STARRS experience … ) -Having access at the same time to the Clocks and the output of the CCD through the ASPIC transparent mode, should allow us to perform all the meaningful debugging on the CCD clock setup and behavior. This will allow LSST to perform the CCD debugging in the same complete way than when the Clock & readout electronic is outside the cryostat. -Remark : to be able to distinguish between CABAC problem and problem with the voltage delivered to the FE, an acquisition of the voltages delivered by the BE should be implemented at BE/RCM level.

16. CCD & CCD readout : Diagnositc, BNL – Elec Raft review – Jan 2012 SCC : Preliminary results 3 C = 20nf (*4) Rise : 5.4µsfall : 4.7µs A : 10VF = 12.5kHz I = 148mA Ripple : ~1.5Vcc

17. You have measurement … you need a prediction … CCD & CCD readout : Diagnositc, BNL – Elec Raft review – Jan 2012 CABAC SCC Current Voltage

18. …and even compare # setup … CCD & CCD readout : Diagnositc, BNL – Elec Raft review – Jan 2012 CABAC SCC

19. ASPIC clamp pattern :  Deactivate a set of channels, change the Xtalk profile. CCD & CCD readout : Diagnositc, BNL – Elec Raft review – Jan 2012

20. ASPIC : Clamp Pattern CCD & CCD readout : Diagnositc, BNL – Elec Raft review – Jan 2012 Function : Through the serial link, mask from 0 to 8 ASPIC channels by keeping their input clamp active all the time, independently of the clamp signal. Goals : -Deactivate a set of channels to change the Xtalk patern -Deactivate a “bad” channel, to reduce Xtalk impact, remark : -Current flow through the ASPIC, could still generate Xtalk in this case, the implementation of a switch ( inside the ASPIC ?) to fully deactivate a channel could be a better choice. Implementation in the ASPIC : - Implementation foreseen in ASPIC III

21. End of Presentation