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Unit 7 Multi-Level Gate Circuits / NAND and NOR Gates Ku-Yaw Chang Assistant Professor, Department of Computer Science and Information.

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Presentation on theme: "Unit 7 Multi-Level Gate Circuits / NAND and NOR Gates Ku-Yaw Chang Assistant Professor, Department of Computer Science and Information."— Presentation transcript:

1 Unit 7 Multi-Level Gate Circuits / NAND and NOR Gates Ku-Yaw Chang canseco@mail.dyu.edu.tw Assistant Professor, Department of Computer Science and Information Engineering Da-Yeh University

2 22004/03/04Fundamentals of Logic Design Objectives Design a minimal two-level or multi-level circuit of AND and OR gates to realize a given function. Design or analyze a two-level gate circuit using any one of the eight basic forms. Design or analyze a multi-level NAND- gate or NOR-gate circuit.

3 32004/03/04Fundamentals of Logic Design Objectives Convert circuits of AND and OR gates to circuits of NAND gates or NOR gates, and conversely, by adding or deleting inversion bubbles. Design a minimal two-level, multiple- output AND-OR, OR-AND, NAND-NAND, or NAND-NOR circuit using Karnaugh maps.

4 42004/03/04Fundamentals of Logic Design Outline 7.1 Multi-Level Gate Circuits 7.2NAND and NOR Gates 7.3Design of Two-Level Circuits Using NAND and NOR Gates 7.4Design of Multi-Level NAND and NOR Gate Circuits 7.5Circuit Conversion Using Alternative Gate Symbols 7.6Design of Two-Level, Multiple-Output Circuits 7.7Multiple-Output NAND and NOR Circuits

5 52004/03/04Fundamentals of Logic Design Outline 7.1 Multi-Level Gate Circuits 7.2NAND and NOR Gates 7.3Design of Two-Level Circuits Using NAND and NOR Gates 7.4Design of Multi-Level NAND and NOR Gate Circuits 7.5Circuit Conversion Using Alternative Gate Symbols 7.6Design of Two-Level, Multiple-Output Circuits 7.7Multiple-Output NAND and NOR Circuits

6 62004/03/04Fundamentals of Logic Design 7.2 NAND and NOR Gates NAND and NOR gates are frequently used Faster Faster Fewer components required (in comparison with AND or OR gates) Fewer components required (in comparison with AND or OR gates) Important Concept Any logic function can be implemented using Any logic function can be implemented using Only NAND gates or Only NOR gates

7 72004/03/04Fundamentals of Logic Design NAND Gate

8 82004/03/04Fundamentals of Logic Design NOR Gate

9 92004/03/04Fundamentals of Logic Design Functionally Complete A set of logic operations is said to be functionally complete if any Boolean functions can be expressed in terms of this set of operations. AND, OR, and NOT is functionally complete Any function can be expressed in the sum-of-products form Any function can be expressed in the sum-of-products form

10 102004/03/04Fundamentals of Logic Design AND and NOT Functionally complete OR can be realized using AND and NOT OR can be realized using AND and NOT

11 112004/03/04Fundamentals of Logic Design OR and NOT Exercise Can AND be realized using OR and NOT? Can AND be realized using OR and NOT?

12 122004/03/04Fundamentals of Logic Design NAND Functionally complete NOT, AND, and OR can be realized using NAND NOT, AND, and OR can be realized using NAND

13 132004/03/04Fundamentals of Logic Design NOR Functionally complete NOT, AND, and OR can be realized using NOR NOT, AND, and OR can be realized using NORExercise Try to draw the NOR gate realization of NOT, AND, and OR Try to draw the NOR gate realization of NOT, AND, and OR

14 142004/03/04Fundamentals of Logic Design Summary Functionally complete AND, OR, and NOT AND, OR, and NOT AND and NOT AND and NOT OR and NOT OR and NOT NAND NAND NOR NOR

15 152004/03/04Fundamentals of Logic Design Outline 7.1 Multi-Level Gate Circuits 7.2NAND and NOR Gates 7.3Design of Two-Level Circuits Using NAND and NOR Gates 7.4Design of Multi-Level NAND and NOR Gate Circuits 7.5Circuit Conversion Using Alternative Gate Symbols 7.6Design of Two-Level, Multiple-Output Circuits 7.7Multiple-Output NAND and NOR Circuits

16 162004/03/04Fundamentals of Logic Design 7.3 Design of Two-Level Circuits Using NAND and NOR Gates A two-level circuit of AND and OR gates is easily converted to a circuit composed of NAND or NOR gates. F = (F’)’ F = (F’)’ DeMorgan’s laws (X 1 +X 2 +…+X n )’ = X 1 ’X 2 ’…X n ’ (X 1 X 2 …X n )’ = X 1 ’+X 2 ’+…+X n ’ DeMorgan’s laws (X 1 +X 2 +…+X n )’ = X 1 ’X 2 ’…X n ’ (X 1 X 2 …X n )’ = X 1 ’+X 2 ’+…+X n ’

17 172004/03/04Fundamentals of Logic Design Conversions (I) A minimum sum-of-products F = A + BC’ + B’CD = [(A + BC’ + B’CD)’]’ = [A’ · (BC’)’ · (B’CD)’]’ = [A’ · (B’+C) · (B+C’+D’)]’ = A + (B’+C)’ + (B+C’+D’)’ AND-OR NAND-NAND OR-NAND NOR-OR

18 182004/03/04Fundamentals of Logic Design Eight Basic Forms (I)

19 192004/03/04Fundamentals of Logic Design Conversions (II) F = A + (B’+C)’ + (B+C’+D’)’ = { [A + (B’+C)’ + (B+C’+D’)’]’ }’ NOR-NOR-INVERT

20 202004/03/04Fundamentals of Logic Design Conversions (III) A minimum product-of-sums F = (A+B+C)(A+B’+C’)(A+C’+D) = { [(A+B+C)(A+B’+C’)(A+C’+D)]’ }’ = [ (A+B+C)’ + (A+B’+C’)’ + (A+C’+D)’ ]’ = (A’B’C’ + A’BC + A’CD’)’ = (A’B’C’)’ · (A’BC)’ · (A’CD’)’ OR-AND NOR-NOR AND-NOR NAND-AND

21 212004/03/04Fundamentals of Logic Design Eight Basic Forms (II)

22 222004/03/04Fundamentals of Logic Design NAND-NOR Gates Readily available in integrated circuit form Faster Faster Fewer components required Fewer components required Two commonly used circuit forms NAND-NAND NAND-NAND NOR-NOR NOR-NOR

23 232004/03/04Fundamentals of Logic Design NAND-NAND Circuit Procedure for designing a minimum two- level NAND-NAND circuit Find a minimum sum-of-products expression of F Find a minimum sum-of-products expression of F Draw the corresponding two-level AND-OR circuit Draw the corresponding two-level AND-OR circuit Replace all gates with NAND gates leaving the gate interconnections unchanged. If the output gate has any signal literals as inputs, complement these literals. Replace all gates with NAND gates leaving the gate interconnections unchanged. If the output gate has any signal literals as inputs, complement these literals.

24 242004/03/04Fundamentals of Logic Design NAND-NAND Circuit In general, F is a sum of literals (l 1, l 2,…) and product forms (P 1, P 2, …): F = l 1 + l 2 + … + P 1 + P 2 + … After applying DeMorgan’s law, F = (l 1 ’ l 2 ’ … P 1 ’ P 2 ’)’

25 252004/03/04Fundamentals of Logic Design NAND-NAND Circuit

26 262004/03/04Fundamentals of Logic Design NOR-NOR Circuit Procedure for designing a minimum two- level NOR-NOR circuit Find a minimum product-of-sums expression of F Find a minimum product-of-sums expression of F Draw the corresponding two-level OR-AND circuit Draw the corresponding two-level OR-AND circuit Replace all gates with NOR gates leaving the gate interconnections unchanged. If the output gate has any signal literals as inputs, complement these literals. Replace all gates with NOR gates leaving the gate interconnections unchanged. If the output gate has any signal literals as inputs, complement these literals.


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