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© 2003 Xilinx, Inc. All Rights Reserved Power Estimation.

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1 © 2003 Xilinx, Inc. All Rights Reserved Power Estimation

2 Power Estimation - 18 - 3 © 2003 Xilinx, Inc. All Rights Reserved For Academic Use Only After completing this module, you will be able to: Objectives List the three phases of the design cycle where power calculations can be performed Estimate power consumption by using the Xilinx Power Estimator worksheet Estimate power consumption by using the XPower utility

3 Power Estimation - 18 - 4 © 2003 Xilinx, Inc. All Rights Reserved For Academic Use Only Outline Introduction Power Estimator Worksheet Using XPower Software Summary

4 Power Estimation - 18 - 5 © 2003 Xilinx, Inc. All Rights Reserved For Academic Use Only Performance (MHz) P MAX Package Power Limit Real World Design Power Consumption High Density Low Density Power Consumption Overview As devices get larger and faster, power consumption goes up First generation FPGAs had: – Lower performance – Lower power requirements – No package power concerns Today's FPGAs have: – Much higher performance – Higher power requirements – Package power limit concerns exist

5 Power Estimation - 18 - 6 © 2003 Xilinx, Inc. All Rights Reserved For Academic Use Only Power Consumption Concerns High-speed and high-density designs require more power, leading to higher junction temperatures Package thermal limits exist – 125 o C for plastic – 150 o C for ceramic Power directly limits: – System performance – Design density – Package options – Device reliability

6 Power Estimation - 18 - 7 © 2003 Xilinx, Inc. All Rights Reserved For Academic Use Only Estimating Power Consumption Estimating power consumption is a complex calculation – Power consumption of an FPGA is almost exclusively dynamic – Power consumption is design dependent and is affected by: Output loading System performance (switching frequency) Design density (number of interconnects) Design activity (percent of interconnects switching) Logic block and interconnect structure Supply voltage

7 Power Estimation - 18 - 8 © 2003 Xilinx, Inc. All Rights Reserved For Academic Use Only Estimating Power Consumption Power calculations can be performed at three distinct phases of the design cycle – Concept phase: A rough estimate of power can be calculated based on estimates of logic capacity and activity rates Use the Xilinx Power Estimator worksheets on the Web – Design phase: Power can be calculated more accurately based on detailed information about how the design is implemented in the FPGA Use XPower™ software – System integration phase: Power is calculated in a lab environment Use actual instrumentation Accurate power calculation at an early stage in the design cycle will result in fewer problems later

8 Power Estimation - 18 - 9 © 2003 Xilinx, Inc. All Rights Reserved For Academic Use Only Activity Rates Accurate activity rates (A.K.A. toggle rates)are required for meaningful power calculations Clocks and input signals have an absolute frequency Synchronous logic nets use a percentage activity rate – 100-percent indicates that a net is expected to change state on every clock cycle – Allows you to adjust the primary clock frequency and see the effect on power consumption – Can be set globally to an average activity rate, on groups or individual nets Logic elements also use a percentage activity rate – Based on the activity rate of output signals of the logic element – Logic elements have capacitance

9 Power Estimation - 18 - 10 © 2003 Xilinx, Inc. All Rights Reserved For Academic Use Only Outline Introduction Power Estimator Worksheet Using XPower Software Summary

10 Power Estimation - 18 - 11 © 2003 Xilinx, Inc. All Rights Reserved For Academic Use Only Xilinx Power Estimator Excel worksheets with power estimation formulas built in – Enter design data in white boxes – Power estimates are shown in red boxes Worksheet sections: – Summary (device totals) – Quiescent power – CLB logic – Block RAMs – Block multipliers – DCMs – I/O pins

11 Power Estimation - 18 - 12 © 2003 Xilinx, Inc. All Rights Reserved For Academic Use Only Power Estimator Worksheet: Summary and Quiescent

12 Power Estimation - 18 - 13 © 2003 Xilinx, Inc. All Rights Reserved For Academic Use Only Power Estimator Worksheet: CLB, RAM, and Multipliers

13 Power Estimation - 18 - 14 © 2003 Xilinx, Inc. All Rights Reserved For Academic Use Only Power Estimator Worksheet: DCM and I/O

14 Power Estimation - 18 - 15 © 2003 Xilinx, Inc. All Rights Reserved For Academic Use Only Outline Introduction Power Estimator Worksheet Using XPower Software Summary

15 Power Estimation - 18 - 16 © 2003 Xilinx, Inc. All Rights Reserved For Academic Use Only What is the XPower Software? A utility for estimating the power consumption and junction temperature of FPGA and CPLD devices Reads an implemented design (NCD file) and timing constraint data You supply activity rates: – Clock frequencies – Activity rates for nets, logic elements, and output pins – Capacitive loading on output pins – Power supply data and ambient temperature – Detailed design activity data from simulation (VCD file) XPower calculates total average power consumption and generates a report

16 Power Estimation - 18 - 17 © 2003 Xilinx, Inc. All Rights Reserved For Academic Use Only Running XPower Expand Implement Design  Place & Route Double-click Analyze Power to launch XPower in interactive mode Use the Generate Power Data process to create reports using VCD files or TCL scripts

17 Power Estimation - 18 - 18 © 2003 Xilinx, Inc. All Rights Reserved For Academic Use Only XPower GUI

18 Power Estimation - 18 - 19 © 2003 Xilinx, Inc. All Rights Reserved For Academic Use Only XPower Reports ASCII ( design. pwr) or HTML ( design.html) formats – Select format in the Edit  Preferences dialog Summary of power consumption Detailed breakdown of power usage (optional) Thermal data – Junction temperature – Theta J-A for chosen package

19 Power Estimation - 18 - 20 © 2003 Xilinx, Inc. All Rights Reserved For Academic Use Only XPower Summary Report Power summary: I(mA) P(mW) ---------------------------------------------------------------- Total estimated power consumption: 807 Vccint 1.50V: 160 240 Vccaux 3.30V: 100 330 Vcco33 3.30V: 72 237 (Additional breakdowns deleted) Thermal summary: ---------------------------------------------------------------- Estimated junction temperature: 46C 250 LFM 43C... Ambient temp: 25C Case temp: 43C Theta J-A range: 26 - 26C/W Decoupling Network Summary: Cap Range (uF) # ---------------------------------------------------------------- Capacitor Recommendations: Total for Vccint : 8 470.0 - 1000.0 : 1 0.0470 - 0.2200 : 1 0.0100 - 0.0470 : 2 0.0010 - 0.0047 : 4 (Other power supplies deleted)

20 Power Estimation - 18 - 21 © 2003 Xilinx, Inc. All Rights Reserved For Academic Use Only XPower Detailed Report Power details: ------------------------------------------------------------------------------- Clocks: Loads Loading(fF) C(pF) F(MHz) I(mA) P(mW) ------------------------------------------------------------------------------- rd_clk_inst/IBUFG Logic: rd_clk_inst/CLKDLL 40 166.7 10.0 15.0 rd_clk_inst/BUFG 6 166.7 1.5 2.3 Nets: rd_clk_dll 364 231 166.7 58.0 86.9 rd_clk_inst/CLK0 1 0 166.7 0.0 ~0.0 rd_clk_inst/IBUFG 1 0 166.7 0.0 ~0.0... ------------------------------------------------------------------------------- Outputs: Loads Loading(fF) C(pF) F(MHz) I(mA) P(mW) ------------------------------------------------------------------------------- Vcco33 final_data_obuf[0] 35000 13 5.0 0.8 2.6... ------------------------------------------------------------------------------- Logic: Loads Loading(fF) C(pF) F(MHz) I(mA) P(mW) ------------------------------------------------------------------------------- cha_fifo_inst/.../FIFO_BRAM.A 32 6.0 0.3 0.4...

21 Power Estimation - 18 - 22 © 2003 Xilinx, Inc. All Rights Reserved For Academic Use Only Outline Introduction Power Estimator Worksheet Using XPower Software Summary

22 Power Estimation - 18 - 23 © 2003 Xilinx, Inc. All Rights Reserved For Academic Use Only Review Questions Power estimations are typically made during which three phases of the design cycle? What methods can be used to enter activity rates into the XPower tool?

23 Power Estimation - 18 - 24 © 2003 Xilinx, Inc. All Rights Reserved For Academic Use Only Answers Power estimations are typically made during which three phases of the design cycle? – Concept phase: Rough estimate based on estimated logic capacity and activity rates – Design phase: More accurate estimate based on information about how the design is implemented in the FPGA – System integration phase: Actual power usage is measured in a lab environment What methods can be used to enter activity rates into the XPower tool? – Load a VCD file – Manually enter activity rates

24 Power Estimation - 18 - 25 © 2003 Xilinx, Inc. All Rights Reserved For Academic Use Only Summary Power calculations can be performed at three distinct phases of the design cycle: – Concept phase: (Xilinx Power Estimator Worksheet) – Design phase: (XPower software) – System integration phase: (lab measurements) Accurate power calculation at an early stage in the design cycle will result in fewer problems later XPower software is a utility for estimating the power consumption and the junction temperature of FPGA and CPLD devices XPower software uses activity rates to calculate total average power consumption

25 Power Estimation - 18 - 26 © 2003 Xilinx, Inc. All Rights Reserved For Academic Use Only Where Can I Learn More? Software manuals: Development System Reference Guide – XPower chapter Online Help from XPower GUI Application Notes: – XAPP158: “Powering Xilinx FPGAs” – XAPP415: “Packaging Thermal Management” Power Estimators (Excel spreadsheets): – http://www.xilinx.com/ise/power_tools/spreadsheet_pt.htm

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