1. Extension for High-Voltage Lateral DMOS Transistors
EKV Compact Model
Extension for High-Voltage
Lateral DMOS Transistors
N. Hefyene (1)
C. Anghel (1)
J.M. Sallese (1)
A.M. Ionescu (1)
(1) EPFL, Lausanne, Switzerland
Contact:

2. · Investigated HV devices · Intrinsic-Drain voltage concept
Outline
· Investigated HV devices
· Intrinsic-Drain voltage concept
· MESDRIFT structure
· Drift resistance modeling
· EKV Model extension to HV DMOS transistors
· Model Parameter
· Model vs. Measurements
· Optimizing Strategy
· Advantages & Limitations
· Future Developements
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3. EXtended lateral DMOS architecture (XDMOS)
INVETIGATED STRUCTURES
EXtended lateral DMOS architecture (XDMOS)
0.7 m HV-CMOS technology from Alcatel Microelectronics (AMIS)
K-point
(VK)
n-channel transistor
Lch= 4mm
 not self-aligned
Intrinsic channel
Drift region
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4. INTRINSIC - DRAIN VOLTAGE CONCEPT  Systematic inspections
of the K-point potential
(VK) in all regimes of operation reveal…
Numerical simulations
of XDMOS
architectures
VK < 10V
for: VG 12V
VD  100V 
VK (VG, VD)
Intrinsic DMOS channel behaves like
a low-voltage MOSFET
à model the intrinsic DMOS
channel with a standard
low-voltage MOSFET model
(like BSIM or EKV)
separately model the characteristics
of the drift region
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5. MESDRIFT : a new test structure
“Cross-sectional illustration”
MESDRIFT structure :
à n+-implant near the channel - drift region delimitation
à high-impedance voltmeter to monitor the VK potential
“Upper view”
Features :
small dimensions of the K-contact compared
to the global device width (10  200 m)
à minor influences on the global device characteristics are expected
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6. XDMOS vs. MESDRIFT : DC characteristics (W = 40 m)
“ID # VD”
“ID # VG”
( ) MESDRIFT
vs.
( ) XDMOS
increased leakage currents in the sub-threshold region
slight shift in VDBR for the MESDRIFT test structure at low VG (<5%)
overall good match between XDMOS and MESDRIFT characteristics
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7. MESDRIFT : typical extracted
Drift characteristics
VK potential evolution with external biases  as predicted by 2D numerical simulation
VKä VDä
VKæ VGä
“VK(VD) @ # VG”
“RD(VD) @ # VG”
Drift resistance evolution with external biases : RD = (VD – VK)  ID
in agreement with 2D numerical simulations (better at high VG , due to the formation of a drift accumulation layer beneath gate oxide)
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8. ( ) Measured vs. ( ) modeled characteristics
DRIFT RESISTANCE MODELING
The proposed quasi-empirical drift expression…
rD0, rD1,  0, 1, 0, 2, 1 & 0  room temperature parameters (T0)
m and n  temperature dependence parameters (T)
p-channel
DMOS
n-channel
Drift expression vs. measured RD (VD, VG) :
( ) Measured vs. ( ) modeled characteristics

Features :
 limited number of parameters… 10!
 good accuracy over temperature…
25°C up to 150°C
 unique expression for different drain
architectures (p- & n-channel XDMOS)
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9. no of device phenomena to be considered
HV-DMOS MODELING
Two possible approaches :
 COMPACT - modeling…
 consider the device unity
 Expression continuity in all regimes of operations
 a set of self-consistent expressions able to predict and reproduce specific phenomena
 MACRO - modeling…
 discrete elements tied together to form a circuit (e.g. MOSFET, JFET, diode, capacitor, Resistor… etc.) VS VG VD VB
JFET
nMOS
pMOS
Diodes VS VG VD VB
Drift model
nMOS  
accuracy
no of device phenomena to be considered 
no of elements   
parameters no & extraction ► ►
no of nodes 
model complexity   ► 
simulation time
circuit complexity 
std. MOS + drift model parameters
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10. MODELING WITH EKV
Assumptions  long-channel approximation (i.e. short-channel effects are neglected)
 eff (i.e. simplified mobility dependence on 2D field-effects)
Simplified expression
Complete expression
Strong-Inversion
Weak & Strong-Inversion
Implicit expression
Can only be solved Numerically
Explicit expression
(2nd order polynomial)
Simple Analytical solutions
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11.  Strong Inversion expressions
Charge expression : , 
Quasi-empirical drift expression
Effective mobility :
Current expressions : 
Smoothing function (i.e. linear to saturation transition) 
Total current expression
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12. MODEL PARAMETER: NAME PARAMETER TYPE VT Threshold voltage
Extracted parameter o
Low-field mobility
VFB
Flat-band voltage
NCH
Channel doping
TOX
Gate oxide thickness G
Transversal mobility degradation factor
Fitting parameter D
Lateral mobility degradation factor 
Smoothing factor
rD0
Drift parameter
rD1 0 1 0 2 1 0
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13. ( ) Measured vs. ( ) modeled characteristics
COMPACT- MODEL vs. MEASURES :
 Fitted on a standard 4 m n-channel XDMOS device, using the simplified drain expression.
ID-VD characteristics (TR)
ID(VD) @ # VG
gD(VD) @ # VG
For ID(VD) curves
( ) Measured vs. ( ) modeled characteristics

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14. ** Errors calculated for G  3V
ID-VG characteristics (TR)
ID(VG) @ # VD
gm(VG) @ # VD
For ID(VG) curves
** Errors calculated for G  3V
( ) Measured vs. ( ) modeled characteristics

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15. depend on known quantities (i.e. VG, VD and measured ID)
GLOBAL OPTIMIZING STRATEGY
 simplified ID formula ►► explicit expression ►►
 since:
depend on known quantities (i.e. VG, VD and measured ID)
n-channel DMOS
“Rdrift(VD) @ # VG”
( ) Extracted (calculated) with RD(VG, VD, T)
( ) Measured on MESDRIFT structure

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16. The modelling strategy can be sequenced as follows:
(i)  Performing standard extrinsic I-V measurements on the HV DMOS transistor;
(ii) Extracting VT and 0 parameters;
(iii) Calculating drift resistance characteristics according to : ;
(iv) Fitting, with the quasi-empirical drift expression the calculated drift-
resistance in (iii);
(v) Injecting the drift parameters, together with the extracted VT and 0 values,
in the simplified drain current expression +
optimisation of the set of injected parameters to fit the desired DC measured characteristics
NOTE: In case weak and moderates inversions have to be modelled, optimised parameters from (v) can be used as initial guess values for the more complex implicit expression of the drain current.
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17. ADVANTAGES & LIMITATIONS
Model Advantages :
 a total # of (8+4) parameters for room temperature model
 simple and fast extraction of intrinsic MOS parameters (i.e. VT and 0)
 a modeling strategy and an extraction procedure, independent on the MESDRIFT
architecture
 a charge based model; adequate and more convenient for AC modeling!
Limitations :
 limited accuracy in the weak inversion region (to be improved)
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18. FUTURE DEVELOPEMENTS Acknowledgements:
 including the temperature dependence for the intrinsic channel part
(under development)
 Replacing the simplified EKV model by a more complete version (e.g. EKV 2.6)
 implementing model equations into simulator using Verilog-A code
 AC-modeling with a charge based approach
 complete model implementation into simulators (e.g. SPICE or SABER)
Acknowledgements:
This work was supported by the IST ‘AUTOMACS' EC project and the Swiss OFES no
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