1. Bipolar Junction
Transistors (BJTs) 1

2. Electronics Concept

3. THE PAST 1904 Flemming 1906 De Forset Vacuum Tubes not reliable
invented a value-Diode
Cathode & Anode
Positive voltages at Anode; current flows
Negative voltages at Anode; No current flows
Acted as Detector
1906 De Forset
Put a third electrode in between and small change in voltage on the grid resulted in a large plate voltage change.
Acted as an amplifier
Vacuum Tubes not reliable

4. Solid State Components
December 1947
Closely space two gold-wires probes were pressed into the surface of a germanium crystal and amplification of input voltages experienced.
Low gain, low bandwidth and Noisy
Junction Transistor invented where the operation depended upon diffusion instead of conduction current.
Had charged carrier of both polarities -- Electron and Holes
1951
Solid state transistors were produced commercially.
Transistor characteristics vary greatly with changes in temperature. Germanium had excessive variations above 750 C, thus Silicon transistor were invented as Silicon Transistors could be used up to 2000 C

5. Semi Conductor Concept

6. Solid State Physics

7. The Integrated Circuit
1958
Kilby conceived the monolithic idea – Building entire circuit out of Germanium or Silicon
Phase-Shift Oscillator, Multivibrator were build from Germanium with thermally bonded gold connecting wires.
Noyce manufactured multiple devices on a single piece of Silicon and was able to reduced the size, weight and cost per active element.

8. Technological Advances
Small Scale Integration (SSI)
less than100 components per chip
Medium Scale Integration (MSI)
More than 100 less than 1000 components per chip
Large Scale Integration (LSI)
More than less than 10,000 components per chip
Very Large Scale Integration (VLSI)
More than 10,000 components per chip

9. INTRODUCTION - BJT Three terminal device Basic Principle
Voltage between two terminals controls current flowing in the third terminal.
Device is used in discrete and integrated circuits and can act as :
Amplifier
Logic Gates
Memory Circuits
Switches
Invented in 1948 at Bell Telephone Industries

10. INTRODUCTION
MOSFET has taken over BJT since 1970’s for designing of integrated circuits but still BJT performance under sever environment is much better than MOSFET e.g. Automotive Electronics
BJT is used in
Very high frequency applications (Wireless Comm)
Very high speed digital logics circuit (Emitter Coupled Logic)
Innovative circuit combine MOSFET being high-input resistance and low power operating devices with BJT merits of being high current handling capacity and very high frequency operation – known as BiMOS or BiCMOS

11. INTRODUCTION Study would include Physical operation of BJT
Terminal Characteristics
Circuit Models
Analysis and design of transistor circuits

12. A simplified structure of the npn transistor.
sedr42021_0501.jpg

13. Device Structure & Physical Operation
npn & pnp Transistor
Three terminal Emitter, Base, Collector
Consists of two pn junctions
np-pn npn
pn-np pnp
Modes
Cutoff, Active, Saturation, Reverse Active
Junctions
Emitter Base Junction (EBJ)
Collector-Base Junction (CBJ)

14. TWO EXAMPLES OF DIFFERENT SHAPES OF TRANSISTOR

15. A simplified structure of the npn transistor.
sedr42021_0502.jpg

16. Current flow in an npn transistor biased to operate in the active mode.
sedr42021_0503.jpg

17. Notation Summarized vB (vC) iB (iC) VB (VC) IB (IC) vb (vc) ib (ic)
Base (collector) Voltage with respect to Emitter
Base (collector) Current toward electrode from external circuit
Instantaneous Total Value (DC + AC)
vB (vC)
iB (iC)
Quiescent Value (DC)
VB (VC)
IB (IC)
Instantaneous Value of varying component (AC)
vb (vc)
ib (ic)
Effective Value of varying components
Vb (Vc)
Ib (Ic)
Supply Voltage (Magnitude)
VBB (VCC)

18. npn Transistor Current in Forward biased junction in active mode:
Emitter Current (IE) flows out of the emitter
Base Current (IB) flows into the Base
Collector Current (IC) flows into the Collector
Majority carriers are electrons as emitter junction is heavily doped and is wider than the base junction, and base junction being lightly doped and has smaller area.

19. Current Flow EBJ – Forward Biased, CBJ – Reversed Biased
Only diffusion current is considered as drift current due to thermally generated minority carriers is very small.
Current components across the EBJ are due to:
Electrons injected from the emitter into the base
This current component is at higher level due to heavily doped emitter
High density of electrons in emitter
Holes injected from the base into the emitter
This current component is small due to lightly doped base
Low density of holes in base

20. Current Flow
Electrons concentration will be the highest at the emitter side and lowest (zero) at the collector side.
Electrons concentration
npo Thermal equilibrium value of Electrons minority carries in the base region
Zero concentration at the collector side is due to positive charge at the collector will be cause electrons to be swept across the CBJ depletion region

21. Profiles of minority-carrier concentrations in
the base and in the emitter of an npn transistor
operating in the active mode: vBE > 0 and vCB ³ 0.
sedr42021_0504.jpg

22. Electrons Diffusion Current
AE Cross sectional area of the EBJ
q Magnitude of electrons charge
DE Electrons Diffusivity in the base
W Effective width of the base
ni Intrinsic Carrier Density
NA Doping concentration in the base
Some of the electrons would be lost due to recombination with the holes in the base, but quite small
Recombination will cause excess minority carriers concentration to take slightly concave shape

23. npn Transistor : Collector Current
IC is independent of VCE, as long as the CBJ is reversed biased – collector is positive w.r.t base
IS (Saturation Current) is
Inversely proportional to the base width
Directly proportional to the area of the EBJ
Typical range A
Varies with changes in temperature every 50 C rise in temperature)

24. npn Transistor : Base Current
iB1 due to the holes injected into emitter region
iB2 due to holes that have to be supplied by the external circuit in order to replace the holes lost from the base through the recombination process

25. Base Current

26. npn Transistor : Base Current
iB=iC/β
β (Beta) Common emitter current gain
Ranges from 50 –200
Constant for a particular transistor
Influenced by :
Width of the base junction (W)
Relative doping of base region w.r.t. emitter region

27. npn Transistor : Emitter Current
α (Common – Base Current Gain) is
constant for a particular transistor
Less or close to unity
Small change in α corresponds to a very large change in β

28. Active Mode Parameters npn Transistor

29. Large-signal equivalent-circuit models of the npn BJT
operating in the forward active mode.
sedr42021_0505a.jpg

30. Common parameters npn & pnp BJT

31. Cross-section of an npn BJT.
sedr42021_0506.jpg

32. Structure of Actual Transistor
Collector surrounds Emitter, thus making it difficult for the electrons injected into the thin base to escape being collected
In this way, the resulting αF ≈ Unity and βF is large.
Structure is not symmetrical so by inter-changing emitter with collector, transistor will operate in reverse mode, resulting in its α and β will be αR and βR and would be lower than αF and βF

33. Structure of Actual Transistor
Typical Value are αR to 0.5
βR o.o1 to 1
CBJ is much large than the EBJ
Collector Diode Dc represents CBJ and has a scale current of ISC and ISC >> ISE of Emitter diode DE
Relationship
αF ISE = αR ISC=IS

34. Model for the npn transistor when operated in the reverse active mode (i.e., with the CBJ forward biased and the EBJ reverse biased).
sedr42021_0507.jpg

35. Equivalent Circuit model
vBE – forward biased EBJ causing an exponentially related current iC to flow
iC is independent of value of the collector voltage as long as CBJ is reversed biased.
vCB ≥ 0 V
Collector terminal behaves as an ideal constant current source and its value is determined by vBE
iC = αiE

36. Equivalent Circuit model
DE has a scale current
ISE = IS/αF
iC Non Linear voltage controlled current source
Can be converted into current controlled current source with controlled source being αFiE
Transistor is used as two port device
Input port Emitter & Base
Output port Collector & Base

37. The Ebers – Moll (EM) Model
Predicts operation of BJT in all possible modes

38. The Ebers-Moll (EM) model of the npn transistor.
sedr42021_0508.jpg

39. The iC –vCB characteristic of an npn transistor fed with a constant emitter current IE. The transistor enters the saturation mode of operation for vCB < –0.4 V, and the collector current diminishes.
sedr42021_0509.jpg

40. Current flow in a pnp transistor biased to operate in the active mode.
sedr42021_0511.jpg

41. Large-signal model for the pnp transistor
operating in the active mode.
sedr42021_0512.jpg

42. Current flow in a pnp & npn transistor biased to operate in the active mode.
sedr42021_0511.jpg

43. Large-signal model for the pnp & npn transistor
operating in the active mode.
sedr42021_0512.jpg

44. Circuit symbols for BJTs.
sedr42021_0513a.jpg

45. Active Mode Parameters pnp Transistor

46. npn - pnp Transistor

47. Comparison BJTs

48. Operation in Active mode
vBE has a range of 0.6 and 0.8 V
vCB is negative so evCB/VT << 1 and can be neglected.
Normally second term on the right hand is small and can be neglected to get equations as shown

49. Actual active mode vBE > 0.5V vCB < - 0.4V
iC remain constant at αFiE for vCB going negative to approx -0.4 V.
Below vCB =-0.4V, CBJ begins to conduct sufficiently– the transistor leaves the active mode and enters into saturation mode, where iC decreases.

50. Operation in Saturation Mode
is lower below -0.4v BJT enters into the saturation mode of operation
Increasing in the negative direction, that is, increasing the forward based voltage of CBJ reduced

51. Voltage polarities and current flow in transistors
biased in the active mode.
sedr42021_0514a.jpg

52. The transistor has β = 100 and exhibits a vBE of 0.7 V At Ic = 1mA.
Example 5.1.
The transistor has β = 100 and exhibits
a vBE of 0.7 V At Ic = 1mA.
Design a circuit so that a current of 2 mA
flows through the collector and voltage drop
of +5V appears at the collector
sedr42021_0515a.jpg

53. Example 5.1.
sedr42021_0515a.jpg

54. Example 5.1.
sedr42021_0515a.jpg

55. Exercise 5.1

56. Exercise 5.4

57. In the circuit, the voltage at the emitter
Figure E5.10
In the circuit, the voltage at the emitter
was measured and found to be – 0.7 V. If
β = 50, find IE, IC, IB, & VC,
sedr42021_e0510.jpg

58. Problem 5-19 A pnp power transistor operates with VEC = 5V iE = 10 A
vEB = 0.85 V
(a) For β = 15 , What base current is required?
(b) What is IS for this transistor?
(c) Compare EBJ area of this transistor with that of a small signal transistor that conducts iC=1mA with vEB =0.7 V. How much larger it is?

59. Solution 5-19

60. Exercise 5.11
Find

61. Solution Exercise 5-11

62. Figure P5.20
sedr42021_p05020a.jpg

63. Problem 5-20 (d)

64. Solution Problem 5-20(d)

65. sedr42021_p05021a.jpg
Figure P5.21

66. Solution Problem 5.21(c)

67. Figure 5.16 The iC –vBE characteristic for an npn transistor.
sedr42021_0516.jpg

68. Figure 5. 17 Effect of temperature on the iC–vBE characteristic
Figure Effect of temperature on the iC–vBE characteristic. At a constant emitter current (broken line), vBE changes by –2 mV/°C.
sedr42021_0517.jpg

69. The iC–vCB characteristics of an npn transistor.
sedr42021_0518a.jpg

70. Common Base Characteristics
iC – vCB for various iE
Base at constant voltage – grounded thus acts a common terminal potential
Curve is not horizontal straight line but has a small positive slop.
iC depends slightly on vCB
At relatively large vCB, iC shows rapid increases – Breakdown phenomena curve

71. Common Base Characteristics
Intersects the vertical axis at a current equal to
Small signal or incremental can be determined by due to at constant

72. The Early Effect In real world
(a) Collector current does show some dependence on collector voltage
(b) Characteristics are not perfectly horizontal line iC - vCE

73. Figure (a) Conceptual circuit for measuring the iC –vCE characteristics of the BJT. (b) The iC –vCE characteristics of a practical BJT.
sedr42021_0519.jpg

74. Common Emitter Configuration
Emitter serves as a common terminal between input and output terminal
Common Emitter Characteristics (ic-vCE)
can be obtained at different value of vBE
and varying vCE (dc), Collector current can be measured

75. The Early Effect
vCE < V CBJ become forward biased & BJT leaves active mode & enters saturation mode
Characteristics is still a straight line but with a finite slope
when extra-polated, the characteristics lines meet at a point on the negative vCE vCE = -VA
Typical value of VA ranges v & called early voltage, after the name of english scientist JM Early

76. The Early Effect
At given vBE , increasing vCE increases reverse biased voltage on CBJ & thus depletion region increases, Resulting in a decrease in the effective base width W
Is is inversely proportional to the base width
Is increases , and Ic also increases proportionally
called Early Effect

77. The Early Effect

78. Figure Large-signal equivalent-circuit models of an npn BJT operating in the active mode in the common-emitter configuration.
sedr42021_0520a.jpg

79. sedr42021_0521.jpg
Figure Common-emitter characteristics. Note that the horizontal scale is expanded around the origin to show the saturation region in some detail.

80. sedr42021_0522.jpg
Figure Typical dependence of b on IC and on temperature in a modern integrated-circuit npn silicon transistor intended for operation around 1 mA.

81. sedr42021_0523.jpg
Figure An expanded view of the common-emitter characteristics in the saturation region.

82. sedr42021_0524a.jpg
Figure (a) An npn transistor operated in saturation mode with a constant base current IB. (b) The iC–vCE characteristic curve corresponding to iB = IB. The curve can be approximated by a straight line of slope 1/RCEsat. (c) Equivalent-circuit representation of the saturated transistor. (d) A simplified equivalent-circuit model of the saturated transistor.

83. sedr42021_0525.jpg
Figure Plot of the normalized iC versus vCE for an npn transistor with bF = 100 and aR = 0.1. This is a plot of Eq. (5.47), which is derived using the Ebers-Moll model.

84. Table 5.3 Symbols & Large Signal Model
sedr42021_tb0503a.jpg

85. Table 5.3 Symbols & Large Signal Model
sedr42021_tb0503a.jpg

86. npn Transistor

87. pnp Transistor

90. Common Emitter Configuration
sedr42021_0526a.jpg

91. Basic common-emitter amplifier circuit.
Transfer characteristic of the circuit
The amplifier is biased at a point Q,
A small voltage signal vi is superimposed on the dc bias voltage VBE.
The resulting output signal vo appears superimposed on the dc collector voltage VCE.
The amplitude of vo is larger than that of vi by the voltage gain Av.

92. Common Emitter Configuration
vi Input signal applied between base & emitter
vBE = vi (Bias + Signal)
vo Output voltage taken between collector & emitter
(ground)
vo = vCE (Bias + Signal)
VCC Power supply needed to
(a) to bias BJT
(b) to supply the power needed for the
operation of amplifier
RC (a) to establish a desired dc bias voltage at the collector
(b) to convert the collector signal current ic to an output voltage vo or vCE
sedr42021_0526a.jpg

93. Large Signal Operation : CE Amplifier
Cutoff Mode
(a) BJT is Cutoff
(b) ic is negligibly small
(c) vo=vCE
Active Mode
(a) BJT conducts
(b) ic increases
(c) vo decreases
Steeper Slope due to exponential term
Active Mode Operation ends when vCE = 0.4V

94. Large Signal Operation : CE Amplifier
vCE < 0.4V
Saturation Mode
Further increase in vBE causes vCE to decrease only slightly.
vCE= vCE sat =0.1 to 0.2V
Current remain constant
ICsat = (vCC - vCE sat ) / RC
RCEsat = vCE sat / ICsat = very small thus short circuit. Switch is closed.
Cutoff Ro = ∞ Switch is controlled by
Sat Ro = the base current

95. Large Signal Operation : CE Amplifier
Saturated BJT exhibits a very small resistance RCEsat

96. Amplifier Gain
BJT as a linear Amplifier – no distortion, no clipping, clamping / Limiting.
Biased point in Active region
Quiescent Point (Q point)
DC base-emitter voltage VBE and DC collector-emitter voltage VCE
@ ‘Q’ Point

97. Amplifier Gain

98. Amplifier Gain Small Signal to be applied at Base
Small gain can be found by differentiating

99. Amplifier Gain CE amplifier Av = -VRC/VT
Inverting Amplifier output is 1800 out of phase relative to input signal
Voltage gain of CE amplifier is ratio of voltage drop across Rc to threshold voltage (VT = 25mV)
To maximize voltage gain use as large as voltage drop across Rc as possible.
For a given VCC, to increase VRC operate at a lower VCE. But limited by amplitude of input signal
Lowering or increasing ‘Q’ point –ve or +ve signal amplitude may take amplifier into saturation or cutoff Mode.
so Clipping will take place
Placing ‘Q’ point too high Av is reduced. as
Placing ‘Q’ Saturation Av is increase

100. Figure 5.27 Circuit whose operation is to be analyzed graphically.
sedr42021_0527.jpg
Little Practical Value

101. Graphical Analysis Procedure Determine dc bias point
Calculate dc base current IB
ic – vCE curve define ‘Q’ point

102. Figure 5.28 Graphical construction for the determination of the dc base current
sedr42021_0528.jpg

103. Figure Graphical construction for determining the dc collector current IC and the collector-to-emitter voltage VCE
sedr42021_0529.jpg

104. Figure Graphical determination of the signal components vbe, ib, ic, and vce when a signal component vi is superimposed on the dc voltage VBB
sedr42021_0530a.jpg

105. Figure Graphical determination of the signal components vbe, ib, ic, and vce when a signal component vi is superimposed on the dc voltage VBB
sedr42021_0530a.jpg

106. Figure Effect of bias-point location on allowable signal swing: Load-line A results in bias point QA with a corresponding VCE which is too close to VCC and thus limits the positive swing of vCE. At the other extreme, load-line B results in an operating point too close to the saturation region, thus limiting the negative swing of vCE.
sedr42021_0531.jpg

107. Figure 5.32 A simple circuit used to illustrate the different modes of operation of the BJT.
sedr42021_0532.jpg

108. Operation as a Switch Cutoff and saturation modes of operation
vi less than 0.5 V the transistor is in cutoff mode,
iB =o, iC=o, vC= VCC
vi greater than 0.5 V (≈ 0.7V), the transistor conducts
iB=(vi-VBE)/RB
iC= βiB
vC>vB-0.4 V …. vC=VCC – RCIC

109. Operation as a Switch

110. Operation as Switch

111. Operation as Switch
vi increased, iB increased, ic will corresponding increase, vc will decreases till vc < vB – 0.4
vc = vB + vCB
The Edge of Saturation

112. Operation as Switch

113. BJT circuit @ DC |VBE| = 0.7 V |VCE| = 0.2V VCE = VCB + VBE
VCBsat =-0.4V
VCE = VCB + VBE
= =0.3V
Saturation Mode
Valid only in active mode

114. Figure 5.33 Circuit for Example 5.3.
sedr42021_0533.jpg

115. Figure 5.34 Analysis of the circuit for Example 5.4
β = 100
sedr42021_0534a.jpg

116. Figure 5.34 Analysis of the circuit for Example 5.4
β = 100
sedr42021_0534a.jpg

117. Figure 5.35 Analysis of the circuit for Example 5.5.
β = 50
β = 50
sedr42021_0535a.jpg

118. Figure 5.35 Analysis of the circuit for Example 5.5.
β = 50
β = 50
sedr42021_0535a.jpg

119. Figure Example 5.6:
sedr42021_0536a.jpg

120. Figure Example 5.7
β = 100
sedr42021_0537a.jpg

121. Figure Example 5.8:
β = 100
sedr42021_0538a.jpg

122. Figure Example 5.9:
β = 30
sedr42021_0539a.jpg

123. Figure 5.40 Circuits for Example 5.10.
sedr42021_0540a.jpg

124. Figure 5.40 Circuits for Example 5.10.

125. Figure 5.41 Circuits for Example 5.11.
sedr42021_0541a.jpg

126. Figure E5.30
sedr42021_e0530.jpg

127. Figure Example 5.12:
sedr42021_0542a.jpg

128. Problem 5.61
Consider the common-emitter amplifier circuit of Fig. 5.26(a) when operated with a supply voltage vcc= +5v
What is the theoretical max. voltage gain that this amplifier can provide?
What value VCE must this amplifier be biased at to provide voltage gain of -100 v/v?
If the dc collector current lc at the bias point in (b) is to be 0.5 mA, what value of Rc should be used?
What is the value of VBE required to provide the bias point mentioned above? Assume that the BJT has ls = 10-15A.

129. If a sine-wave signal vbe having a 5-mV peak amplitude is superimposed on VBE, find the corresponding output voltage signal vce that will superimposed on VCE assuming linear operation around the bias point?
Characterize the signal current ic that will be superimposed on the dc bias current lc.
What is the value of the dc base current ib at the bias point. Assume B(beta) = 100. characterize the signal current ib that will be superimposed on base current lB
Dividing the amplitude of vbe by the amplitude of ib evaluate the incremental (or small-signal) input resistance of the amplifier.

130. Sketch and clearly label correlated graphs of vBE, vce,ic and iB
Sketch and clearly label correlated graphs of vBE, vce,ic and iB. note that each graph consists of a dc or average value and a superimposed sine wave. Be careful of the phase relationships of the sine wave.

131. Problem 5.68
+6V
Consider the operation of the circuit shown as vB rises slowly from zero. For this transistor, assume B(beta) = 50, vBE at which the transistor conducts is 0.5V, vBE when fully conducting 0.7V, saturation begins at vBC = 0.4V, and the transistor is deeply in saturation at vBC = 0.6V.
For what range of vB is ic essentially zero?
What are the value of vE, iE, iC and vC for vB = 1V and 3V?
For what value of vB does saturation begin? What is iB at this point?
For vB =4V and 6V,what are the values of vE, vC, iE, iC and iB? Augment your sketch by adding a plot of iB. vC vi ve

132. sedr42021_p05085.jpg
Figure P5.85

133. Solution

134. sedr42021_p05085.jpg

135. Biasing of BJT Amplifier circuit
Biasing to establish constant DC Collector current Ic & should be
Calculatable
Predictable
Insensitive to temp. variations
Insensitive to large variations in β
To allow max. output signal swing with no distortion

136. Figure 5.43 Two obvious schemes for biasing the BJT: (a) by fixing VBE; (b) by fixing IB.
sedr42021_0543a.jpg

137. Figure 5.44 Classical biasing for BJTs using a single power supply:
Typical Biasing
Single power supply
Voltage Divider Network
RE in Emitter Circuit
sedr42021_0544a.jpg

138. Typical Biasing

139. Figure 5.44 Classical biasing for BJTs using a single power supply:
sedr42021_0544a.jpg

140. Classical Discrete-circuit Bias arrangement

141. Base Emitter Loop

142. Classical Discrete-circuit Bias arrangement
For stable Ic, IE must be stable as IC =αIE
To make IE insensitive to VBE (temp.) & β variations
VBB >> VBE
RE>> RB/(β+1)

143. Classical Discrete-circuit Bias arrangement VBB >> VBE
But for higher gain VRC should be more Larger signal Swing (before cutoff)
Av=-VRC / VT
VCB be large VCE is large for larger signed swing (before saturation)
Compromise
Role of thumb

144. Classical Discrete-circuit Bias arrangement
RE>> RB/(β+1)
For Stable IE - Negative Feed Back through RE
If IE increases somehow, VRE increases,
hence VE increases correspondingly,
VBB = VBE + VE ; VBE decreases for maintaining constant VBB
Reduces collector (Emitter) current. Stable IE

145. Figure 5.45 Biasing the BJT using two power supplies.
sedr42021_0545.jpg

146. Two Power Supplies Version

147. Two Power Supplies Version

148. Two Power Supplies Version

149. Figure 5.46 (a) A common-emitter transistor amplifier biased by a feedback resistor RB.
sedr42021_0546a.jpg

150. A common-emitter transistor amplifier biased by
a feedback resistor RB.
RB provide negative Feedback
sedr42021_0546a.jpg

151. A common-emitter transistor amplifier biased by
a feedback resistor RB.

152. A common-emitter transistor amplifier biased by
a feedback resistor RB.

153. A BJT biased using a constant-current source I.
sedr42021_0547a.jpg

154. Biasing using a constant current source
Current in Emitter means
Constant IC IC =α IE
Independent of RB & β value thus RB can be made large to
Increase Input resistance
Large signal swing at collector
Q1 acts as Diode CBJ is short circuits

155. Biasing using a constant current source
Q1 acts as Diode CBJ is short circuits
VCC-IREFR-VBE+VEE=0
I = IREF=(VCC-VBE+VEE)/R
Since Q1 & Q2 have VBE is same
I constant till Q2 in Active Mode (Region) & can be guaranteed by
Voltage at collector V > (-VEE+VBE)
Current Mirror

156. Biasing using a constant current source
IE is independent of β & RB
RB can be made large thus increasing
input resistance
Simple Design
Q1 & Q2 are matched pair
Q1 is Diode collector- Base connected
β high IB can be neglected
α = 1 IC = IE
I = IREF=(VCC-VBE+VEE)/R