1. ECA1212 Introduction to Electrical & Electronics Engineering Chapter 5: Bipolar Junction Transistor by Muhazam Mustapha, October 2011

2. Learning Outcome Be able to explain some basic physical theory and operation of BJT Be able to do calculation on DC and AC analysis on BJT circuit By the end of this chapter students are expected to:

3. Chapter Content Theory of BJT BJT Operation DC Analysis AC Analysis

4. Bipolar Junction Transistor CO1

5. Bipolar Junction Transistor If diodes are made by fabricating one PN junction, BJT are made by fabricating two PN junctions. It involves fabrication of 3 layers of P-N-P (pnp) or N-P-N (npn) types: p p n n n p The middle layer has to be very thin 3 terminals are attached to the 3 layers CO1

6. Terminals The middle layer is called BASE (B) The top and bottom layers are not symmetrical Top layer is called COLLECTOR (C) – doped more lightly than the bottom layer (emitter) Collector p n n n p Bottom layer is called EMITTER (E) – doped more heavily than the top layer (collector) Collector Emitter Base p + + CO1

7. Circuit Symbol and Notations npn BJT symbol: pnp BJT symbol: CC EE BB The direction of the arrow is the direction of the current when the BE junction is put on forward bias CC EE BB CO1

8. Circuit Symbol and Notations In normal operation, BE junction is put to forward bias For that reason, npn is more popular since E is normally put to the lowest voltage on the BJT Hence, B has to be at higher voltage in order to put BE junction in forward bias CO1

9. Circuit Symbol and Notations Notation for currents and voltage for npn: C E B iBiB iCiC iEiE v CE + − v CB + − v BE + − KCL: i E = i B + i C KVL: v CE = v CB + v BE For pnp, the polarities are reversed CO1

10. Transport Phenomena Transistor can be considered as two diode joined back to back with the joint at base Diode of BE junction is forward biased, hence there will be current flowing Diode of CB junction is reverse biased, hence there is no current C E B CO1

11. Transport Phenomena So how do we get current flowing through C? Current manages to get through C due to the fact that B layer is very thin Since B layer is very thin, the reversely flowing transport (electron or hole) at BE junction will overshoot into the depletion region on the reverse biased CB junction CO1

12. Transport Phenomena P N N hole movement forward biased electron movement overshooting electrons across reverse biased junction causing large avalanche current CO1

13. Transport Phenomena These overshot transport will further collide with the covalence bond in depletion region and produce more holes and electrons The newly produced electrons and holes will further collide with other bonds and produce more and more new free electrons and holes The whole process explained above is called avalanche These avalanche produced electrons and holes will too move under the influence of the external field (voltage of v CE ) CO1

14. Transport Phenomena Hence the current through C (i C ) is contributed by the overshooting and avalanched transport Since the overshooting current is due to i B, and since the amount of the avalanche current is due to the overshooting current, then the amount of avalanche current would be proportional to i B So as to say, i B actually controls i C by some multiplication factor This factor is called the CURRENT GAIN, β CO1

15. I-V Characteristic Since i C can be controlled by i B, we can consider BJT like an input-output transfer box The current and voltage input parameter of BJT are i B and v BE respectively While the current and voltage output parameter of BJT are i C and v CE respectively The I-V characteristic of BJT is featured by the I-V characteristics of these input and output C E B iBiB iCiC v CE + − v BE + − OUTPUT INPUT CO1

16. BE (Input) Characteristic Since BE junction is just like a forward biased diode, the I-V characteristic is so like that too 500 400 300 200 100 0.10.20.30.40.50.60.70.80.91.0 I B (μA) V BE (V) CO1

17. CE (Output) Characteristic Since CB junction is reversed biased, the I-V characteristic of CE is flat (zero) unless I B > 0 With some values of I B, we get a family of I-V flattening curves for CE 50 40 30 20 10 123456789 I C (mA) V CE (V) I B = 50μA I B = 100μA I B = 150μA I B = 200μA I B = 250μA I B = 300μA I B = 0 CO1

18. Operation Region BJT may be put to operate at 4 different operation mode – for our class we will be covering only 3 modes The 3 modes are called operation region The region is defined by the areas in CE (output) I-V characteristic graph: Active Saturation Cutoff CO1

19. Operation Region 50 40 30 20 10 123456789 I C (mA) V CE (V) I B = 50μA I B = 100μA I B = 150μA I B = 200μA I B = 250μA I B = 300μA I B = 0 CUTOFF REGION SATURATION REGION ACTIVE REGION CO1

20. Cutoff State / Region The BJT is basically in OFF condition with no current flowing because I B is zero Uses: OFF state in digital circuit OFF state for analog switch Detailed features: I B = 0 I C = I CEO ≈ 0 V CE ≥ 0 V BE < V D CO1

21. Saturation State / Region The BJT is basically in full ON condition with very low V CE whereby the BJT may be considered to have a very low output resistance Uses: ON state in digital circuit ON state for analog switch Detailed features: I B > 0 I C < βI B V CE = V sat ≈ 0.2V V BE = V D CO1

22. Active State / Region The BJT is in linear analog amplification mode whereby I C is almost proportional to I B Uses: Analog signal amplication Detailed features: I B > 0 I C = βI B V CE > V D V BE = V D CO1

23. Detecting Operation Region It’s easy: If V BE < V D (means I B is 0), then the BJT is in cutoff regardless of V CE If V BE = V D and V CE = V sat, then the BJT is in saturation Otherwise it is in active region – BE junction forward biased and BC junction reverse biased CO1

24. Biasing (DC Analysis) CO1

25. DC Analysis (Biasing) Biasing of a transistor means putting the transistor’s V CE and I C into a desired position in the I C -V CE graph This is done normally if we want the transistor to operate in active region Cutoff and saturation region normally don’t require much biasing since the area is limited The biasing process is a little tricky since I C is controlled by I B – not directly by V CE Refer to Giorgio Rizzoni’s Principles and Applications of Electrical Engineering: Chapter 10.4, Example 10.7, Example 10.9 CO1

26. DC Analysis (Biasing) The position of the biased BJT’s V CE and I C is called Q point The value of I B is also required for the biasing There are a few biasing configuration exist, but for the purpose of non-EE class, we will only study the most popular configuration called self- bias common emitter configuration –Refer to Giorgio Rizzoni’s Fundamentals of Electrical Engineering Figure 10.28 CO1 Refer to Giorgio Rizzoni’s Principles and Applications of Electrical Engineering: Chapter 10.4, Example 10.7, Example 10.9

27. DC Analysis (Biasing) Refer to Giorgio Rizzoni’s Principles and Applications of Electrical Engineering: Figure 10.29 R2R2 R1R1 V CC RCRC RERE IBIB ICIC V CE + − V BE + − IEIE RBRB V CC RCRC RERE IBIB ICIC V CE + − V BE + − IEIE V BB Thevenin’s Equivalent V BB = (V CC )(R 2 )/(R 1 +R 2 ) R B = R 1 || R 2 CO1

28. DC Analysis (Biasing) The target of biasing process is to find the value of the resistors so that Q point is position at around V CC /2 in the I C -V CE characteristic graph R 1, R 2 and R E will determine I B I B will determine I C – either by I C = βI B, or by an I C -V CE graph Then from KVL, V CE = V CC −I C R C −I E R E –This equation is what called load-line equation Refer to Giorgio Rizzoni’s Principles and Applications of Electrical Engineering: pages 573 – 575 CO1

29. DC Analysis (Biasing) Steps: R 1 and R 2 will be combined using Thevenin’s theorem to form R B Use KVL on BE loop to get I B from R B and I E Use β or I C -V CE graph to get I C Use KVL on CE loop (load-line equation) with the required V CE for the Q point to get R C Refer to Giorgio Rizzoni’s Principles and Applications of Electrical Engineering: pages 573 – 575 CO1

30. DC Analysis (Biasing) Class discussion: Giorgio Rizzoni’s Principles and Applications of Electrical Engineering: pages 573 – 575, Example 10.9 CO1

31. AC Analysis CO1

32. AC Analysis AC analysis is done to determine the performance of transistor amplifier circuit There are a few parameters of interest, like input and output resistance, but for the purpose of non-EE class, we will do only AC gain (current and voltage) AC analysis is done after biasing is completed and assuming there is some AC signal being introduced into the circuit as superimpose on top of the DC values (biasing) Refer to Giorgio Rizzoni’s Principles and Applications of Electrical Engineering: Example 10.8, page 570-574 CO1

33. AC Analysis Refer to Giorgio Rizzoni’s Principles and Applications of Electrical Engineering: Example 10.8, page 570-574 The oscillation of the input and output signals will be denoted by Δ (delta) For this class we will consider the I-V characteristic of the sinusoidal input and output signals will be the same as the DC relationship –next slide CO1

34. AC Analysis Refer to Giorgio Rizzoni’s Principles and Applications of Electrical Engineering: Example 10.8, page 570-574 R2R2 R1R1 V CC RCRC RERE ΔVBΔVB ΔVOΔVO CO1

35. AC Analysis Refer to Giorgio Rizzoni’s Principles and Applications of Electrical Engineering: Example 10.8, page 570-574 Output Input Voltage Gain CO1

36. ΔV O Formula Refer to Giorgio Rizzoni’s Principles and Applications of Electrical Engineering: Example 10.8, page 570-574 R2R2 R1R1 V CC RCRC RERE ΔVBΔVB ΔVOΔVO In the formula for ΔV O, it only depends on ΔI C even though from the KVL at the output it should also depends on ΔI E. The reason for this is in real circuit we put a capacitor across R E which effectively SHORTS circuit R E when AC current flows – means we can disregard R E in AC analysis formula. CO1

37. AC Analysis Class discussion: Giorgio Rizzoni’s Principles and Applications of Electrical Engineering: pages 570 – 574, Example 10.8 CO1