1. ® ChipScope ILA TM Xilinx and Agilent Technologies

2. ® www.xilinx.com Short Design Cycles are Critical  Time-to-market pressures increase in all market segments  Verification and debug are typically the largest time variable  Designer productivity is critical for reducing design cycle time  Tools to speed verification and debug are required

3. ® www.xilinx.com Traditional Debug Methods Don’t Work for Today’s Designs  Multi-million gate designs require more testing time  Increasing system speeds reduce probing accuracy  DLLs in FPGAs, Processors, RAMs and ASICs can not be single stepped  BGAs have no external leads for traditional tools  Multi-layer board sizes are shrinking allowing less space for test features  Board probing is becoming impossible for 16+ bit busses

4. ® www.xilinx.com Typical Board Debug Setup Scope Probe Download Cable Logic Analyzer 40-Pin Pod before Chipscope ILA

5. ® www.xilinx.com Preferred Debug Setup with Chipscope ILA USB port Serial Port -or- JTAG Connections (w/ optional Slave Serial) Simple!

6. ® www.xilinx.com Xilinx’ ChipScope ILA Solution Logic analysis core integrated in the FPGA —Software interface to monitor and analyze results —Access to all internal design nodes —Many flexible trigger options —Operates at the full system speed synchronous to the design clock up to 155 MHz —Does not require single stepping the design —Virtex, Virtex-E and Spartan II compatible

7. ® www.xilinx.com Xilinx Partners with Agilent Technologies  Industry leaders join forces to provide integrated verification solutions  ChipScope ILA developed for Agilent compatibility  Allows further system-level analysis with leading tools Agilent Technologies 16702B Logic Analyzer

8. ® www.xilinx.com ChipScope ILA System Control USER FUNCTION ILA USER FUNCTION USER FUNCTION ILA Chipscope ILA PC running ChipScope MultiLINX Cable or Parallel Cable III JTAG Connection Target Board Target FPGA with ILA cores JTAG

9. ® www.xilinx.com ChipScope ILA Features

10. ® www.xilinx.com ChipScope ILA Components  Two Cores —ICON control core for communication via the JTAG port —ILA capture core for trigger and trace capture  ChipScope Software —Used for configuration, setup, and trace display  Download Cable —MultiLINX : communicates via USB / RS232 —Parallel Cable III : communicates via parallel port

11. ® www.xilinx.com ICON Core Fundamentals  Provides communication and control to ILA and future Xilinx ChipScope cores  One ICON per device supports up to 15 ILAs  Uses BSCAN_VIRTEX special block  USER1 scan chain used for ILA modifications —Write to ILA trigger control registers —Read Trigger Status —Data read and status

12. ® www.xilinx.com ILA Core Fundamentals  Trigger settings are in-system changeable without affecting the user logic  Uses Virtex specific features to reduce area and to improve speed and functionality  User-selectable trigger functionality  Parameterizable data and trigger width

13. ® www.xilinx.com ChipScope CLB Resource Utilization  Single basic ILA with ICON core

14. ® www.xilinx.com ChipScope Block RAM Resource Utilization  Single basic ILA with ICON core

15. ® www.xilinx.com ChipScope ILA Software  Provides an easy-to-use graphical interface for —FPGA configuration download —ILA capture setup and trigger modifications —Waveform display for captured traces —Can write the waveforms to VCD format for other waveform viewers  Communicates to the download cable’s software API  Output format compatible with Agilent Technologies’ 16700 series analyzer  PC-Windows based; Upcoming Solaris support 3Q00

16. ® www.xilinx.com ChipScope Screen Shot

17. ® www.xilinx.com Board Requirements  IEEE 1149.1 Boundary Scan chain —Headers for TDI, TCK, TMS, TDO —Works in multi-chip Boundary Scan chains —Works with Boundary Scan chains containing non- Virtex devices  Headers for GND and VCC of 2.5-5.0V for download cable  For slave-serial programming (MultiLINX only) —Headers for PROGRAM, DONE, INIT, DIN, CCLK

18. ® www.xilinx.com How to Get Started  Order through Xilinx Silicon Xpresso Café or normal distribution channels —Single-user one-year license for $495 —Single-user one-year license including MultiLINX cable for $995 —Download ChipScope ILA software —Generate ICON and ILA cores through the web —Access documentation through ChipScope ILA product page on www.xilinx.com  Real-time on-chip debugging is here today!