1. Premduth Vidyanandan & Adrian Hernandez
Xilinx Virtual Cable
Premduth Vidyanandan & Adrian Hernandez

2. Overview
Xilinx Virtual Cable (XVC) provides a means to program and debug your FPGA design without using a USB or parallel configuration cable.  This capability helps facilitate programming and debug of systems that:
Have an FPGA in an inaccessible location
Require remote programming and debug of an FPGA
Do not have direct access to the FPGA pins – e.g. the JTAG pins are only accessible via a local processor interface

3. Key Features
XVC is an internet-based protocol that acts like a JTAG cable
Extensible to allow for safe, secure connections
Debug and programming via Vivado hardware manager

4. System Block Diagram

5. System Connection Flow

6. Vivado TCL: open_hw_target
New option added to open_hw_target
open_hw_target –xvc_url <url>
Operation Details:
Option will open the target using the current_hw_server
Once opened, get_hw_targets shows the XVC target
XVC connection is closed when disconnect_hw_server is called, user will need to call open_hw_target to open connection back up
If hw_server already has an xvc_target open, then the xvc_target will be discovered like any other cable

7. Initializing hw_server with xvc connection
When hw_server is initialized with an XVC connection Vivado discovers the cable just like any USB cable
Start hw_server with these arguments
hw_server -e "set auto-open-servers xilinx-xvc:localhost:10200”
The argument to the auto-open-servers argument is as follows
xilinx-xvc:<xvc_ip/name>:<xvc_port>

8. Debugging XVC
XVC can be debugged by launching hw_server with the following arguments:
hw_server –L- -e "set xvc-log-level 1“
The “-e” argument sets the XVC log level
Log data is controlled through the –L

9. For more information… Main XVC page:
Vivado Programming and Debug User Guide